公开(公告)号：US20150280108A1

公开(公告)日：2015-10-01

申请号：US14741446

申请日：2015-06-16

申请人： JEONG-HEON PARK ,  KI-WOONG KIM ,  HEE-JU SHIN ,  JOON-MYOUNG LEE ,  WOO-JIN KIM ,  JAE-HOON KIM ,  SE-CHUNG OH ,  YUN-JAE LEE

发明人： JEONG-HEON PARK ,  KI-WOONG KIM ,  HEE-JU SHIN ,  JOON-MYOUNG LEE ,  WOO-JIN KIM ,  JAE-HOON KIM ,  SE-CHUNG OH ,  YUN-JAE LEE

IPC分类号： H01L43/02 ,  H01L27/22 ,  H01L23/528 ,  H01L43/08

CPC分类号： H01L43/02 ,  G11C11/161 ,  H01F10/30 ,  H01F10/32 ,  H01F10/3254 ,  H01F10/3272 ,  H01L23/528 ,  H01L27/222 ,  H01L43/08 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.

公开(公告)号：US20150048464A1

公开(公告)日：2015-02-19

申请号：US14254871

申请日：2014-04-16

申请人： JEONG-HEON PARK ,  KI-WOONG KIM ,  HEE-JU SHIN ,  JOON-MYOUNG LEE ,  WOO-JIN KIM ,  JAE-HOON KIM ,  SE-CHUNG OH ,  YUN-JAE LEE

发明人： JEONG-HEON PARK ,  KI-WOONG KIM ,  HEE-JU SHIN ,  JOON-MYOUNG LEE ,  WOO-JIN KIM ,  JAE-HOON KIM ,  SE-CHUNG OH ,  YUN-JAE LEE

IPC分类号： H01L43/02

CPC分类号： H01L43/02 ,  G11C11/161 ,  H01F10/30 ,  H01F10/32 ,  H01F10/3254 ,  H01F10/3272 ,  H01L23/528 ,  H01L27/222 ,  H01L43/08 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.

摘要翻译： 提供了具有彼此间隔开的自由层和钉扎层的半导体器件。 在自由层和钉扎层之间形成隧道势垒层。 被钉扎层可以包括下钉扎层和与下钉扎层隔开的上钉扎层。 可以在下钉扎层和上钉扎层之间形成间隔件。 非磁性接合层可以邻近间隔物设置在上或下钉扎层中的层之间。