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1.发明授权Method and apparatus for discriminating multipath and pulse noise distortions in radio receivers 有权用于鉴别无线电接收机中的多路径和脉冲噪声失真的方法和装置公开(公告)号：US06944301B1
公开(公告)日：2005-09-13
申请号：US09265659
申请日：1999-03-10
CPC分类号： H04H20/47
摘要： Distortion discrimination circuitry for digital radio receivers and corresponding methods are disclosed that accurately and efficiently discriminate distortion events, including impulse noise and multipath distortion events, to improve the quality of audio output signals. The distortion discrimination circuitry monitors and analyzes the demodulator output to determine when a distortion event has occurred and provides an appropriate indication signal for use by other circuitry within the radio receiver. More particularly, the distortion discrimination circuitry includes impulse noise circuitry that looks for high frequency noise in both the magnitude and multiplexed outputs of the demodulator to determine the occurrence of impulse noise distortion events. The distortion discrimination circuitry also includes multipath circuitry that looks for a drop-off in signal power between the multiplexed output of the demodulator and a moving average version of that same signal to determine the occurrence of multipath distortion events. In addition, stereo decoder circuitry modifies the audio output signals in response to indications of distortion events.
摘要翻译： 公开了用于数字无线电接收机的失真鉴别电路和相应的方法，其精确和有效地区分包括脉冲噪声和多径失真事件在内的失真事件，以提高音频输出信号的质量。 失真识别电路监视和分析解调器输出以确定失真事件何时发生，并提供适当的指示信号供无线电接收机内的其他电路使用。 更具体地，失真识别电路包括在解调器的幅度和复用输出中寻找高频噪声以确定脉冲噪声失真事件的出现的脉冲噪声电路。 失真识别电路还包括多路径电路，其寻找解调器的多路复用输出与该相同信号的移动平均版本之间的信号功率的下降以确定多径失真事件的发生。 此外，立体声解码器电路响应于失真事件的指示来修改音频输出信号。
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公开(公告)号：US06389270B1
公开(公告)日：2002-05-14
申请号：US09266418
申请日：1999-03-10
IPC分类号： H04B118
CPC分类号： H03J1/0091 , H03J1/0066
摘要： Station scan circuitry for a radio-frequency receiver and corresponding methods are disclosed that efficiently determine the presence of a station on available channels. The station scan circuitry includes circuitry that determines if the signal power on a given channel exceeds a threshold value. Additional circuitry compares the channel signal strength and the adjacent channel signal to determine if a ratio of the two exceeds a threshold level. If both the signal power and the signal strength ratio are sufficient, the station scan circuitry indicates that a station has been found. To make the signal strength comparison, the station scan circuitry includes circuitry for determining a post-filter signal strength and a pre-filter signal strength for the received signal.
摘要翻译： 公开了用于射频接收机的站扫描电路和相应的方法，其有效地确定站在可用信道上的存在。 站扫描电路包括确定给定信道上的信号功率是否超过阈值的电路。 附加电路比较信道信号强度和相邻信道信号，以确定两者的比值是否超过阈值水平。 如果信号功率和信号强度比都足够，则站扫描电路指示已经找到站。 为了进行信号强度比较，站扫描电路包括用于确定接收信号的后置滤波器信号强度和预滤波器信号强度的电路。
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3.发明授权公开(公告)号：US06650264B1
公开(公告)日：2003-11-18
申请号：US09414209
申请日：1999-10-07
IPC分类号： H03M300
CPC分类号： H03M1/1215 , H03M3/40 , H03M3/47
摘要： Quadrature sampling architecture and method are disclosed for analog-to-digital converters that provide improved digital output signals over prior quadrature mixing implementations. Sampling circuitry according to the present invention samples an input signal with a first and second sampling signals to produce real and imaginary sampled output signals. The first sampling signal, which is associated with the real sampled output signal, is delayed by one-fourth cycle with respect to the second sampling signal, which is associated with the imaginary sampled output signal. This one-fourth cycle sampling signal difference allows for simplified construction of the sampling circuitry. In addition, filter circuitry according to the present invention processes the real and imaginary digital data output signals so that the imaginary digital data output signal is advanced by one-fourth cycle with respect to the real digital data output signal. This one-fourth cycle relative advance tends to eliminate undesirable magnitude distortion and error signals in complex digital output signals that have been mixed down to baseband. Furthermore, the real and imaginary signal paths may be interchanged and still take advantage of the present invention.
摘要翻译： 公开了用于模数转换器的正交采样架构和方法，其在现有的正交混频实现方面提供改进的数字输出信号。 根据本发明的采样电路用第一和第二采样信号对输入信号进行采样以产生实数和虚数采样的输出信号。 与实际采样输出信号相关联的第一采样信号相对于与虚拟采样输出信号相关联的第二采样信号被延迟四分之一周期。 这个四分之一周期采样信号差异允许采样电路的简化结构。 此外，根据本发明的滤波器电路处理实数和虚数数字输出信号，使得虚数数字数据输出信号相对于实数数字数据输出信号提前四分之一。 这个四分之一周期的相对提前趋向于消除已经被混合到基带的复杂数字输出信号中的不期望的幅度失真和误差信号。 此外，实信号路径和虚信号路径可以互换，并且仍然利用本发明。
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4.发明授权公开(公告)号：US06900701B2
公开(公告)日：2005-05-31
申请号：US10403705
申请日：2003-03-31
CPC分类号： G06F1/04
摘要： Oscillator circuitry on an integrated circuit automatically detects the presence or absence of an external resistor which is used to bias and set the frequency of an internal resistor-capacitor (RC) oscillator. If the resistor is present, the RC oscillator begins to oscillate to generate an oscillator clock. The presence of the oscillator clock is detected, and the RC oscillator continues to generate the oscillator clock. If the resistor is not present, the RC oscillator does not begin to oscillate. The absence of the oscillator clock is detected, and the oscillator circuitry automatically re-configures itself to generate the oscillator clock from an internal crystal oscillator circuit employing an external crystal.
摘要翻译： 集成电路上的振荡器电路自动检测外部电阻的存在或不存在，用于偏置和设置内部电阻 - 电容（RC）振荡器的频率。 如果存在电阻，则RC振荡器开始振荡以产生振荡器时钟。 检测到振荡器时钟的存在，并且RC振荡器继续产生振荡器时钟。 如果电阻不存在，则RC振荡器不会开始振荡。 检测到振荡器时钟的缺失，并且振荡器电路自动重新配置，以从采用外部晶体的内部晶体振荡器电路产生振荡器时钟。
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