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    Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor
    4.
    发明授权
    Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor 失效
    用于间接访问内存映射资源的支持接口以减少带外支持处理器的系统连接的方法

    公开(公告)号：US07916722B2

    公开(公告)日：2011-03-29

    申请号：US12139631

    申请日：2008-06-16

    申请人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    发明人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    IPC分类号： H04L12/28 ,  H04L12/56 ,  H04L12/66 ,  G06F3/00 ,  G06F12/00

    CPC分类号： G06F15/7842

    摘要： A method and apparatus are provided for a support interface for memory-mapped resources. A support processor sends a sequence of commands over and FSI interface to a memory-mapped support interface on a processor chip. The memory-mapped support interface updates memory, memory-mapped registers or memory-mapped resources. The interface uses fabric packet generation logic to generate a single command packet in a protocol for the coherency fabric which consists of an address, command and/or data. Fabric commands are converted to FSI protocol and forwarded to attached support chips to access the memory-mapped resource, and responses from the support chips are converted back to fabric response packets. Fabric snoop logic monitors the coherency fabric and decodes responses for packets previously sent by fabric packet generation logic. The fabric snoop logic updates status register and/or writes response data to a read data register. The system also reports any errors that are encountered.

    摘要翻译： 提供了一种用于存储器映射资源的支持接口的方法和装置。 支持处理器将一系列命令和FSI接口发送到处理器芯片上的存储器映射支持接口。 内存映射支持接口更新内存，内存映射寄存器或内存映射资源。 该接口使用结构数据包生成逻辑在由地址，命令和/或数据组成的一致性结构的协议中生成单个命令分组。 结构命令转换为FSI协议，并转发到附加的支持芯片以访问存储器映射的资源，并且来自支持芯片的响应被转换回到结构响应分组。 Fabric监听逻辑监视一致性结构，并解码先前由Fabric数据包生成逻辑发送的数据包的响应。 织物窥探逻辑更新状态寄存器和/或将响应数据写入读取数据寄存器。 系统还报告遇到的任何错误。

    Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor
    5.
    发明授权
    Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor 失效
    用于间接访问内存映射资源的支持接口以减少带外支持处理器的系统连接的方法

    公开(公告)号：US07418541B2

    公开(公告)日：2008-08-26

    申请号：US11055404

    申请日：2005-02-10

    申请人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    发明人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    IPC分类号： G06F12/00 ,  G05B13/02 ,  G06F15/00 ,  G06F15/76

    CPC分类号： G06F15/7842

    摘要： A method and apparatus are provided for a support interface for memory-mapped resources. A support processor sends a sequence of commands over and FSI interface to a memory-mapped support interface on a processor chip. The memory-mapped support interface updates memory, memory-mapped registers or memory-mapped resources. The interface uses fabric packet generation logic to generate a single command packet in a protocol for the coherency fabric which consists of an address, command and/or data. Fabric commands are converted to FSI protocol and forwarded to attached support chips to access the memory-mapped resource, and responses from the support chips are converted back to fabric response packets. Fabric snoop logic monitors the coherency fabric and decodes responses for packets previously sent by fabric packet generation logic. The fabric snoop logic updates status register and/or writes response data to a read data register. The system also reports any errors that are encountered.

    摘要翻译： 提供了一种用于存储器映射资源的支持接口的方法和装置。 支持处理器将一系列命令和FSI接口发送到处理器芯片上的存储器映射支持接口。 内存映射支持接口更新内存，内存映射寄存器或内存映射资源。 该接口使用结构数据包生成逻辑在由地址，命令和/或数据组成的一致性结构的协议中生成单个命令分组。 结构命令转换为FSI协议，并转发到附加的支持芯片以访问存储器映射的资源，并且来自支持芯片的响应被转换回到结构响应分组。 Fabric监听逻辑监视一致性结构，并解码先前由Fabric数据包生成逻辑发送的数据包的响应。 织物窥探逻辑更新状态寄存器和/或将响应数据写入读取数据寄存器。 系统还报告遇到的任何错误。

    Method for providing low-level hardware access to in-band and out-of-band firmware
    6.
    发明授权
    Method for providing low-level hardware access to in-band and out-of-band firmware 失效
    用于提供对带内和带外固件的低级硬件访问的方法

    公开(公告)号：US07467204B2

    公开(公告)日：2008-12-16

    申请号：US11055675

    申请日：2005-02-10

    申请人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    发明人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    IPC分类号： G06F15/173 ,  G06F15/167

    CPC分类号： G06F15/161

    摘要： In-band firmware executes instructions which cause commands to be sent on a coherency fabric. Fabric snoop logic monitors the coherency fabric for command packets that target a resource in one of the support chips attached via an FSI link. Conversion logic converts the information from the fabric packet into an FSI protocol. An FSI command is transmitted via the FSI transmit link to an FSI slave of the intended support chip. An FSI receive link receives response data from the FSI slave of the intended support chip. Conversion logic converts the information from the support chip received via the FSI receive link into the fabric protocol. Response packet generation logic generates the fabric response packet and returns it on the coherency fabric. An identical FSI link between a support processor and support chips allows direct access to the same resources on the support chips by out-of-band firmware.

    摘要翻译： 带内固件执行指令，使指令在一致性结构上发送。 Fabric Snoop逻辑监视针对通过FSI链接附加的支持芯片之一的资源的命令包的一致性结构。 转换逻辑将信息从Fabric数据包转换为FSI协议。 FSI命令通过FSI传输链路发送到预期支持芯片的FSI从站。 FSI接收链路从预期的支持芯片的FSI从站接收响应数据。 转换逻辑将从通过FSI接收链路接收的支持芯片的信息转换为结构协议。 响应分组生成逻辑生成结构响应分组并将其返回到一致性结构上。 支持处理器和支持芯片之间的相同FSI链路允许通过带外固件直接访问支持芯片上的相同资源。

    Providing low-level hardware access to in-band and out-of-band firmware
    7.
    发明授权
    Providing low-level hardware access to in-band and out-of-band firmware 失效
    提供对带内和带外固件的低级硬件访问

    公开(公告)号：US08090823B2

    公开(公告)日：2012-01-03

    申请号：US12259942

    申请日：2008-10-28

    申请人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    发明人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    IPC分类号： G06F15/173 ,  G06F15/167

    CPC分类号： G06F15/161

    摘要： Illustrative embodiments disclose a data processing system providing low-level hardware access to in-band and out-of-band firmware. The data processing system includes a plurality of chips that includes at least one processor chip and a plurality of support chips. At least one processor chip includes a field replaceable unit support interface master that uses a field replaceable unit support interface serial transmission protocol to communicate with the plurality of support chips. Each one of the plurality of support chips includes a field replaceable unit support interface slave in, with ones of the plurality of chips that include a processor also include the field replaceable unit support interface master, and ones of the plurality of chips that do not include the processor include only the field replaceable unit support interface slave. Only the field replaceable unit support interface master possesses conversion logic.

    摘要翻译： 说明性实施例公开了提供对带内和带外固件的低级硬件访问的数据处理系统。 数据处理系统包括多个芯片，其包括至少一个处理器芯片和多个支持芯片。 至少一个处理器芯片包括使用现场可更换单元支持接口串行传输协议与多个支持芯片进行通信的现场可更换单元支持接口主机。 多个支持芯片中的每一个包括现场可更换单元支持接口从机，其中包括处理器的多个芯片中的一个包括现场可更换单元支持接口主机，以及不包括的多个芯片中的一个 处理器仅包括现场可更换单元支持接口从站。 只有现场可更换单元支持接口主机具有转换逻辑。

    Method for Providing Low-Level Hardware Access to In-Band and Out-of-Band Firmware
    8.
    发明申请
    Method for Providing Low-Level Hardware Access to In-Band and Out-of-Band Firmware 失效
    提供低级硬件访问带内和带外固件的方法

    公开(公告)号：US20090055563A1

    公开(公告)日：2009-02-26

    申请号：US12259942

    申请日：2008-10-28

    申请人： James Stephen Fields, JR. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    发明人： James Stephen Fields, JR. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    IPC分类号： G06F13/42

    CPC分类号： G06F15/161

    摘要： In-band firmware executes instructions which cause commands to be sent on a coherency fabric. Fabric snoop logic monitors the coherency fabric for command packets that target a resource in one of the support chips attached via an FSI link. Conversion logic converts the information from the fabric packet into an FSI protocol. An FSI command is transmitted via the FSI transmit link to an FSI slave of the intended support chip. An FSI receive link receives response data from the FSI slave of the intended support chip. Conversion logic converts the information from the support chip received via the FSI receive link into the fabric protocol. Response packet generation logic generates the fabric response packet and returns it on the coherency fabric. An identical FSI link between a support processor and support chips allows direct access to the same resources on the support chips by out-of-band firmware.

    摘要翻译： 带内固件执行指令，使指令在一致性结构上发送。 Fabric Snoop逻辑监视针对通过FSI链接附加的支持芯片之一的资源的命令包的一致性结构。 转换逻辑将信息从Fabric数据包转换为FSI协议。 FSI命令通过FSI传输链路发送到预期支持芯片的FSI从站。 FSI接收链路从预期的支持芯片的FSI从站接收响应数据。 转换逻辑将从通过FSI接收链路接收的支持芯片的信息转换为结构协议。 响应分组生成逻辑生成结构响应分组并将其返回到一致性结构上。 支持处理器和支持芯片之间的相同FSI链路允许通过带外固件直接访问支持芯片上的相同资源。

    Method and system for performing pseudo-random testing of an integrated circuit
    9.
    发明授权
    Method and system for performing pseudo-random testing of an integrated circuit 失效
    用于执行集成电路的伪随机测试的方法和系统

    公开(公告)号：US06393594B1

    公开(公告)日：2002-05-21

    申请号：US09372698

    申请日：1999-08-11

    申请人： Carl J. Anderson ,  Michael Stephen Floyd ,  Larry Scott Leitner ,  Bradley McCredie ,  Kevin Franklin Reick ,  Jennifer Lane Vargus

    发明人： Carl J. Anderson ,  Michael Stephen Floyd ,  Larry Scott Leitner ,  Bradley McCredie ,  Kevin Franklin Reick ,  Jennifer Lane Vargus

    IPC分类号： G06F1100

    CPC分类号： G01R31/318385 ,  G01R31/3183

    摘要： A method and system for testing an integrated circuit. A test substrate is provided which is manufactured by the same particular production technology for which the integrated circuit is designed. A pattern generator for generating test data and a result checker for comparing output data are embedded on the test substrate. Isolated portions of circuitry of the integrated circuit are selectively embedded onto the test substrate. Test data from the pattern generator is applied to the isolated portions of circuitry under a first operating condition. The data output from the isolated portions of circuitry is selectively recorded into the result checker. The isolated portions of circuitry are then subjected to testing by applying test data from the pattern generator to the isolated portions of circuitry under a second operating condition. Errors in the isolated portions of circuitry are detected with the result checker by comparing data output from the isolated portions of circuitry with the selectively recorded data output, such that the integrated circuit is tested by subsets, independently of testing the integrated circuit in its entirety.

    摘要翻译： 一种用于测试集成电路的方法和系统。 提供了通过设计集成电路的相同特定制造技术制造的测试基板。 用于产生测试数据的图形发生器和用于比较输出数据的结果检查器嵌入在测试基板上。 集成电路的电路的隔离部分选择性地嵌入到测试基板上。 来自图案发生器的测试数据被应用于在第一操作条件下的电路的隔离部分。 从电路的隔离部分输出的数据被选择性地记录到结果检查器中。 然后通过在第二操作条件下将来自图案发生器的测试数据应用到电路的隔离部分来对电路的隔离部分进行测试。 通过将来自电路的隔离部分的输出的数据与选择性记录的数据输出进行比较来检测电路的隔离部分中的错误，使得集成电路被子集测试，独立于集成电路的整体测试。

    Method and apparatus for a high-speed serial communications bus protocol with positive acknowledgement
    10.
    发明授权
    Method and apparatus for a high-speed serial communications bus protocol with positive acknowledgement 失效
    具有正确确认的高速串行通信总线协议的方法和装置

    公开(公告)号：US06529979B1

    公开(公告)日：2003-03-04

    申请号：US09436105

    申请日：1999-11-08

    申请人： Michael Stephen Floyd ,  Larry Scott Leitner ,  Kevin Franklin Reick

    发明人： Michael Stephen Floyd ,  Larry Scott Leitner ,  Kevin Franklin Reick

    IPC分类号： G06F1314

    CPC分类号： G06F13/4217

    摘要： A method and apparatus for transferring data using an on-chip bus is presented. A data transaction consisting of an address and data packet is transmitted on an on-chip bus which is a two-wire serial bus consisting of an address line and a data line that connects a plurality of satellites in a daisy-chain fashion to a central source. Each on-chip satellite is associated with a unique identifier. In response to a determination that the transaction is accepted by the satellite, which is determined by the address in the address packet positively comparing to a unique identifier for the satellite, the address packet is modified to provide a positive acknowledgment of a receipt of the address packet back to the central source of the transaction. The address packet is modified by clearing the stop bit of the address packet, i.e. gating off or negating the stop bit. Alternatively, the address packet is otherwise modified to indicate the acceptance of the packet. The source of the address packet will identify that the operation was successful by detecting that the stop bit is cleared from the framed address packet, thereby receiving the positive acknowledgment indication, thus indicating that a successful transaction occurred.

    摘要翻译： 提出了使用片上总线传送数据的方法和装置。 由地址和数据分组组成的数据事务在片上总线上发送，片上总线是两线串行总线，由串行方式连接多个卫星的地址线和数据线组成， 资源。 每个片上卫星与唯一标识符相关联。 响应于确定交易被卫星接受，其由地址分组中的地址确定，与卫星的唯一标识符正相比较，地址分组被修改以提供对地址的接收的肯定确认 数据包回到交易的中心来源。 通过清除地址分组的停止位，即关闭或取消停止位来修改地址分组。 或者，地址分组被修改以指示分组的接受。 通过检测到停止位从成帧的地址分组中清除，地址分组的源将识别出操作成功，从而接收到肯定的确认指示，从而指示成功的事务发生。