公开(公告)号：US20230123255A1

公开(公告)日：2023-04-20

申请号：US18085633

申请日：2022-12-21

Applicant: Japan Display Inc.

Inventor： Koji YAMAMOTO ,  Tatsuya ISHII

IPC: H01L27/12 ,  G09G3/36 ,  H01L29/786 ,  H01L27/02 ,  G09G3/3266

Abstract: To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.

公开(公告)号：US20180233076A1

公开(公告)日：2018-08-16

申请号：US15884423

申请日：2018-01-31

Applicant: Japan Display Inc.

Inventor： Naoki MIYANAGA ,  Koji YAMAMOTO

IPC: G09G3/20 ,  G09G3/36 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1368

CPC classification number: G09G3/2003 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/123 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2300/0823 ,  G09G2320/0666 ,  G09G2354/00

Abstract: According to one embodiment, an RGB image signal is output from a driver, first ends of a first open-close signal line and a second open-close signal line are each connected to the driver and second ends of the first open-close signal line and the second open-close signal line are free. Power is supplied to a signal selection circuit, which selects a signal line and outputs a polarity inverted image signal, via the first open-close signal line and the second open-close signal line.

公开(公告)号：US20170162605A1

公开(公告)日：2017-06-08

申请号：US15333377

申请日：2016-10-25

Applicant: Japan Display Inc.

Inventor： Koji YAMAMOTO ,  Tatsuya ISHII

IPC: H01L27/12 ,  G09G3/3266 ,  G09G3/36 ,  H01L27/02 ,  H01L29/786

CPC classification number: H01L27/1244 ,  G09G3/3266 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2310/0286 ,  G09G2330/04 ,  H01L27/0255 ,  H01L29/78633 ,  H01L29/78648

Abstract: To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.

公开(公告)号：US20210405491A1

公开(公告)日：2021-12-30

申请号：US17474099

申请日：2021-09-14

Applicant: Japan Display Inc.

Inventor： Koji YAMAMOTO ,  Naoyuki OBINATA ,  Kengo SHIRAGAMI

IPC: G02F1/1362 ,  G06T7/00

Abstract: A display device includes wires that are coupled to driver terminals that are able to be coupled to a driver integrated circuit (IC) and that are provided along a first direction and extending so as to spread toward outsides in the first direction as the wires are directed toward a second direction orthogonal to the first direction; and dummy wires that are provided along the wires on one outside and another outside in the first direction of the wires and that are not coupled to the driver terminals and the wires, wherein a number of the dummy wires on the one outside and a number of the dummy wires on the other outside are respectively three or more, the dummy wires extend in parallel with the wires, and a width of the dummy wire is equal to a width of the wire.

公开(公告)号：US20210183909A1

公开(公告)日：2021-06-17

申请号：US17186424

申请日：2021-02-26

Applicant: Japan Display Inc.

Inventor： Koji YAMAMOTO ,  Tatsuya Ishii

IPC: H01L27/12 ,  G09G3/36 ,  H01L29/786 ,  H01L27/02 ,  G09G3/3266

Abstract: To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.

公开(公告)号：US20200243573A1

公开(公告)日：2020-07-30

申请号：US16851663

申请日：2020-04-17

Applicant: Japan Display Inc.

Inventor： Koji YAMAMOTO ,  Tatsuya ISHII

IPC: H01L27/12 ,  G09G3/36 ,  H01L29/786 ,  H01L27/02 ,  G09G3/3266

Abstract: To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.

公开(公告)号：US20200006398A1

公开(公告)日：2020-01-02

申请号：US16558850

申请日：2019-09-03

Applicant: Japan Display Inc.

Inventor： Koji YAMAMOTO ,  Tatsuya ISHII

IPC: H01L27/12 ,  G09G3/36 ,  G09G3/3266 ,  H01L27/02 ,  H01L29/786

Abstract: To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.

公开(公告)号：US20180197893A1

公开(公告)日：2018-07-12

申请号：US15912672

申请日：2018-03-06

Applicant: Japan Display Inc.

Inventor： Koji YAMAMOTO ,  Tatsuya ISHII

IPC: H01L27/12 ,  G09G3/36 ,  H01L29/786 ,  H01L27/02 ,  G09G3/3266

CPC classification number: H01L27/1244 ,  G09G3/3266 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2310/0286 ,  G09G2330/04 ,  H01L27/0255 ,  H01L29/78633 ,  H01L29/78648

Abstract: To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.

公开(公告)号：US20160223876A1

公开(公告)日：2016-08-04

申请号：US14994676

申请日：2016-01-13

Applicant: Japan Display Inc.

Inventor： Koji YAMAMOTO ,  Akihiko SAITOH ,  Seiichi SATO ,  Nobuko FUKUOKA

IPC: G02F1/1343 ,  G02F1/1368 ,  G02F1/1337 ,  G02F1/1333 ,  G02F1/1339

CPC classification number: G02F1/136286 ,  G02F1/133345 ,  G02F2001/133388 ,  G02F2001/134372

Abstract: According to one embodiment, provide is a liquid crystal display device that suppresses potential change of a common electrode caused by potential change of a signal line. An electrode part is provided on an array substrate so as to surround a display region. A signal line is provided on the array substrate so as to be located in the display region. A passivation film is provided on the array substrate so as to cover at least the signal line and the electrode part. A one-side opening part is provided continuously along an edge part of the display region on the passivation film so that the electrode part is disposed. The common electrode is provided on the array substrate so that a part of the common electrode is located at the one-side opening part and another part of the common electrode is located facing the signal line on the passivation film.

Abstract translation: 根据一个实施例，提供一种抑制由信号线的电位变化引起的公共电极的电位变化的液晶显示装置。 电极部设置在阵列基板上，以围绕显示区域。 信号线设置在阵列基板上，以便位于显示区域中。 在阵列基板上设置钝化膜，至少覆盖信号线和电极部。 沿着钝化膜上的显示区域的边缘部分连续地提供单侧开口部分，使得设置电极部分。 公共电极设置在阵列基板上，使得公共电极的一部分位于单侧开口部分，并且公共电极的另一部分面对钝化膜上的信号线。

公开(公告)号：US20140368778A1

公开(公告)日：2014-12-18

申请号：US14475147

申请日：2014-09-02

Applicant: JAPAN DISPLAY INC.

Inventor： Koji YAMAMOTO ,  Tetsuya IIZUKA

IPC: G02F1/1343 ,  G02F1/1333

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/134381 ,  G02F2001/136218 ,  G02F2201/121

Abstract: In one embodiment, a first shield electrode and a second shield electrode are arranged on a first substrate. A first source line and a second source line are arranged facing the first and second shield electrodes through an insulating layer, respectively. A first main common electrode and a second main common electrode are formed facing the first and second source lines through an insulating layer, respectively. A main pixel electrode is formed so as to locate between the first and second main common electrodes. A second substrate includes a third main common electrode and a fourth main common electrode facing the first and second main common electrodes, respectively. A liquid crystal layer is held between the first and second substrates. The first, second, third and fourth main common electrodes are set to the same electric potential.

Abstract translation: 在一个实施例中，第一屏蔽电极和第二屏蔽电极布置在第一基板上。 第一源极线和第二源极线分别通过绝缘层面向第一和第二屏蔽电极。 第一主公共电极和第二主公共电极分别通过绝缘层面对第一和第二源极线。 主像素电极形成为位于第一和第二主公共电极之间。 第二基板包括分别面对第一和第二主公共电极的第三主公共电极和第四主公共电极。 液晶层保持在第一和第二基板之间。 第一，第二，第三和第四主要公共电极被设置为相同的电位。