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    DISPLAY DEVICE
    1.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号：US20190066634A1

    公开(公告)日：2019-02-28

    申请号：US16057934

    申请日：2018-08-08

    申请人： Japan Display Inc.

    发明人： Masaya TAMAKI ,  Yutaka MITSUZAWA ,  Takayuki NAKAO ,  Yutaka OZAWA

    IPC分类号： G09G5/395 ,  G09G3/36

    摘要： A display device includes: sub-pixels each including a memory block including memories; memory selection line groups each including memory selection lines electrically coupled to the memory blocks in the sub-pixels that belong to the corresponding row; a memory selection circuit configured to concurrently output memory selection signals to the memory selection line groups; a potential line; a conduction switch provided for at least one memory in the memory block on a one-to-one basis; and an operating-memory conduction circuit configured to output, to the conduction switch, an operation signal for determining whether to electrically couple or uncouple the potential line and the corresponding one memory. Each memory is capable of storing sub-pixel data therein when being coupled to the potential line. Each sub-pixel displays an image based on the sub-pixel data stored in one memory in the sub-pixel according to the memory selection line supplied with the memory selection signal.

    DISPLAY DEVICE
    3.
    发明申请
    DISPLAY DEVICE 审中-公开
    显示设备

    公开(公告)号：US20160351145A1

    公开(公告)日：2016-12-01

    申请号：US15161933

    申请日：2016-05-23

    申请人： Japan Display Inc.

    发明人： Fumitaka GOTOH ,  lsao EDATSUNE ,  Yutaka OZAWA ,  Tsutomu HARADA

    IPC分类号： G09G3/36

    摘要： According to an aspect, a display device includes: a display area provided to a substrate; a shift register including a plurality of registers coupled in series; and a control circuit that supplies clock pulses to the registers, and that supplies a start pulse to a first register of the shift register to acquire an output from a last register of the shift register, wherein the display area is provided in an area surrounded by the shift register, the control circuit, and wiring that couples the shift register to the control circuit.

    摘要翻译： 根据本发明的一个方面，显示装置包括：提供给基板的显示区域; 移位寄存器，包括串联耦合的多个寄存器; 以及控制电路，其向所述寄存器提供时钟脉冲，并且将起始脉冲提供给所述移位寄存器的第一寄存器以获取来自所述移位寄存器的最后寄存器的输出，其中所述显示区域设置在由 移位寄存器，控制电路和将移位寄存器耦合到控制电路的布线。

    DISPLAY DEVICE
    4.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号：US20200152159A1

    公开(公告)日：2020-05-14

    申请号：US16738537

    申请日：2020-01-09

    申请人： Japan Display Inc.

    发明人： Masaya TAMAKI ,  Yutaka MITSUZAWA ,  Takayuki NAKAO ,  Yutaka OZAWA

    IPC分类号： G09G5/395 ,  G09G3/36

    摘要： A display device includes: sub-pixels each including a memory block including memories; memory selection line groups each including memory selection lines electrically coupled to the memory blocks in the sub-pixels that belong to the corresponding row; a memory selection circuit configured to concurrently output memory selection signals to the memory selection line groups; a potential line; a conduction switch provided for at least one memory in the memory block on a one-to-one basis; and an operating-memory conduction circuit configured to output, to the conduction switch, an operation signal for determining whether to electrically couple or uncouple the potential line and the corresponding one memory. Each memory is capable of storing sub-pixel data therein when being coupled to the potential line. Each sub-pixel displays an image based on the sub-pixel data stored in one memory in the sub-pixel according to the memory selection line supplied with the memory selection signal.

    DISPLAY DEVICE
    5.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号：US20200152147A1

    公开(公告)日：2020-05-14

    申请号：US16744638

    申请日：2020-01-16

    申请人： Japan Display Inc.

    发明人： Yutaka MITSUZAWA ,  Takayuki NAKAO ,  Yutaka OZAWA ,  Masaya TAMAKI

    IPC分类号： G09G3/36

    摘要： A display device is provided and includes sub-pixels each including a sub-pixel electrode, and a first and second memory; a clock signal output circuit configured to, based on a reference clock signal, output a plurality of clock signals having different frequencies; a selection circuit configured to select one of the clock signals as a selected clock signal; a memory selection circuit configured to select all of the first memories included in all the sub-pixels or all of the second memories included in all the sub-pixels in synchronization with the selected clock signal; a common electrode facing all of the sub-pixel electrodes; and a common-electrode driving circuit configured to provide a common potential to the common electrode, wherein the common potential is inverted in synchronization with the reference clock signal, wherein the sub-pixel electrode is driven based on sub-pixel data stored in the selected one of the memories to display an image.

    DISPLAY DEVICE
    6.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号：US20190005904A1

    公开(公告)日：2019-01-03

    申请号：US16020055

    申请日：2018-06-27

    申请人： Japan Display Inc.

    发明人： Yutaka MITSUZAWA ,  Takayuki NAKAO ,  Yutaka OZAWA ,  Masaya TAMAKI

    IPC分类号： G09G3/36

    摘要： A display device includes: a plurality of sub-pixels each including a memory block; a clock signal output circuit configured to output a plurality of clock signals having different frequencies; a selection circuit configured to select one of the clock signals as a selected clock signal; a plurality of memory selection line groups provided for respective rows; a memory selection circuit configured to output a memory selection signal concurrently to the memory selection line groups in synchronization with the selected clock signal, the memory selection signal being a signal for selecting one from a plurality of memories in each of the memory blocks; a common electrode to which a common potential common to the sub-pixels is supplied; and a common-electrode driving circuit configured to switch the common potential in synchronization with the reference clock signal and output the switched common potential.

    DISPLAY DEVICE
    7.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号：US20190311684A1

    公开(公告)日：2019-10-10

    申请号：US16374434

    申请日：2019-04-03

    申请人： Japan Display Inc.

    发明人： Yutaka OZAWA

    IPC分类号： G09G3/34 ,  G09G3/36 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1335 ,  F21V8/00

    摘要： A display device includes: pixels arranged in a row direction and in a column direction in a display area, each pixel including a memory block including memories; memory selection line groups each including memory selection lines electrically coupled to the memory block of each of the pixels belonging to a corresponding row; a memory selection circuit that simultaneously outputs a memory selection signal to the memory selection line groups; light sources; a light source selection circuit that selects which light source is to be used; and a light guide plate that guides the light emitted from selected light source to the display area. One of the memories is selected, and each pixel displays an image based on pixel data being stored in the selected memory. The light source selected by the light source selection circuit emits light over an entire period of time in which the one memory is selected.