Packaging reliability super chips
    1.
    发明申请
    Packaging reliability super chips 有权
    包装可靠性超级芯片

    公开(公告)号:US20060290372A1

    公开(公告)日:2006-12-28

    申请号:US11491216

    申请日:2006-07-21

    IPC分类号: G01R31/26

    摘要: A test chip module for testing the integrity of the flip chip solder ball interconnections between chip and substrate. The interconnections are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.

    摘要翻译: 用于测试芯片和衬底之间的倒装芯片焊球互连的完整性的测试芯片模块。 互连通过在芯片冶金层中形成的各个加热器的阵列进行热应力,以提供均匀且普遍存在的热源。 电流通过互连使用一个信号I / O互连由电流供应电路进行测试,并且通过其中通过的电流将要测试的互连线上的电压降由通过另一个信号I / O连接的电压测量电路测量 互连。 在互连处的应力引发开裂和退化在互连上产生可测量的电压降变化。

    Packaging reliability superchips
    2.
    发明申请
    Packaging reliability superchips 失效
    包装可靠性超级芯片

    公开(公告)号:US20080088335A1

    公开(公告)日:2008-04-17

    申请号:US11954589

    申请日:2007-12-12

    IPC分类号: G01R31/26

    摘要: A test chip module for testing the integrity of the nip chip solder ball interconnections between chip and substrate. The interconnection, are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.

    摘要翻译: 一种测试芯片模块,用于测试芯片和基板之间的夹芯焊料球互连的完整性。 互连通过形成在芯片冶金层中的各个加热器的阵列而受到热应力,以提供均匀且普遍存在的热源。 电流通过互连使用一个信号I / O互连由电流供应电路进行测试,并且通过其中通过的电流将要测试的互连线上的电压降由通过另一个信号I / O连接的电压测量电路测量 互连。 在互连处的应力引发开裂和退化在互连上产生可测量的电压降变化。