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公开(公告)号：US11977098B2
公开(公告)日：2024-05-07
申请号：US18159794
申请日：2023-01-26
申请人： AEHR TEST SYSTEMS
CPC分类号： G01R1/0441 , G01R1/0416 , G01R1/0491 , G01R1/06705 , G01R1/07307 , G01R31/2601 , G01R31/2855 , G01R31/2863 , G01R31/2886 , G01R31/2887
摘要： A method of testing an integrated circuit of a device is described. Air is allowed through a fluid line to modify a size of a volume defined between the first and second components of an actuator to move a contactor support structure relative to the apparatus and urge terminals on the contactor support structure against contacts on the device. Air is automatically released from the fluid line through a pressure relief valve when a pressure of the air in the fluid line reaches a predetermined value. The holder is moved relative to the apparatus frame to disengage the terminals from the contacts while maintaining the first and second components of the actuator in a substantially stationary relationship with one another. A connecting arrangement is provided including first and second connecting pieces with complementary interengaging formations that restricts movement of the contactor substrate relative to the distribution board substrate in a tangential direction.
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公开(公告)号：US20240103068A1
公开(公告)日：2024-03-28
申请号：US18523604
申请日：2023-11-29
申请人： AEHR TEST SYSTEMS
发明人： Donald P. Richmond, II , Kenneth W. Deboe , Frank O. Uher , Jovan Jovanovic , Scott E. Lindsey , Thomas T. Maenner , Patrick M. Shepherd , Jeffrey L. Tyson , Mark C. Carbone , Paul W. Burke , Doan D. Cao , James F. Tomic , Long V. Vu
CPC分类号： G01R31/287 , G01R31/003 , G01R31/26 , G01R31/2642 , G01R31/2851 , G01R31/2863 , G01R31/2868 , G01R31/2872 , G01R31/2877 , G01R31/2886 , G01R31/2889 , G01R31/2891 , G06F8/30 , G01R31/2855 , G01R31/31924
摘要： An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.
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公开(公告)号：US20240094281A1
公开(公告)日：2024-03-21
申请号：US18521432
申请日：2023-11-28
发明人： Ankita PATIDAR , Sandeep Kumar GOEL , Yun-Han LEE
IPC分类号： G01R31/28 , G01R31/317 , G06F30/398
CPC分类号： G01R31/2855 , G01R31/31721 , G06F30/398 , G06F2119/08
摘要： A method of testing an integrated circuit on a test circuit board includes performing, by a processor, a simulation of a first heat distribution throughout an integrated circuit design, and simultaneously performing a burn-in test of the integrated circuit and an automated test of the integrated circuit. The burn-in test has a minimum burn-in temperature of the integrated circuit or a burn-in heat distribution across the integrated circuit that includes a set of circuit blocks or a first set of heaters. The integrated circuit design corresponding to the integrated circuit. The performing the simulation includes determining a heat signature of the integrated circuit design from configured power information or location information for each circuit block of the set of circuit blocks or each heater of the set of heaters included in the integrated circuit design. The heat signature includes heat values distributed throughout the integrated circuit design.
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公开(公告)号：US11879933B2
公开(公告)日：2024-01-23
申请号：US17393232
申请日：2021-08-03
发明人： Ankita Patidar , Sandeep Kumar Goel , Yun-Han Lee
IPC分类号： G01R31/02 , G06F30/398 , G01R31/317 , G06F119/08 , G01R31/28
CPC分类号： G01R31/2855 , G01R31/31721 , G06F30/398 , G06F2119/08
摘要： A method of testing an integrated circuit on a test circuit board includes performing, by a processor, a simulation of a first heat distribution throughout an integrated circuit design, manufacturing the integrated circuit according to the integrated circuit design, and simultaneously performing a burn-in test of the integrated circuit and an automated test of the integrated circuit. The burn-in test has a minimum burn-in temperature of the integrated circuit and a burn-in heat distribution across the integrated circuit. The integrated circuit design corresponds to the integrated circuit. The integrated circuit is coupled to the test circuit board. The integrated circuit includes a set of circuit blocks and a first set of heaters.
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公开(公告)号：US20190212763A1
公开(公告)日：2019-07-11
申请号：US16242010
申请日：2019-01-08
发明人： Yu Wu
CPC分类号： G05F3/262 , G01R31/2855 , G05F1/575 , H03F1/34 , H03F1/342
摘要： A test device is provided. An output terminal of an operational amplifier is coupled to a device under test. A current replication circuit copies a current flowing through a charging circuit and a discharge circuit according to voltages of control terminals of the charging circuit and the discharge circuit in the operational amplifier and outputs a test result signal.
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公开(公告)号：US20180113150A1
公开(公告)日：2018-04-26
申请号：US15839707
申请日：2017-12-12
申请人： Aehr Test Systems
CPC分类号： G01R1/0441 , G01R1/0416 , G01R1/0491 , G01R1/06705 , G01R1/07307 , G01R31/2601 , G01R31/2855 , G01R31/2863 , G01R31/2886 , G01R31/2887
摘要： A method of testing an integrated circuit of a device is described. Air is allowed through a fluid line to modify a size of a volume defined between the first and second components of an actuator to move a contactor support structure relative to the apparatus and urge terminals on the contactor support structure against contacts on the device. Air is automatically released from the fluid line through a pressure relief valve when a pressure of the air in the fluid line reaches a predetermined value. The holder is moved relative to the apparatus frame to disengage the terminals from the contacts while maintaining the first and second components of the actuator in a substantially stationary relationship with one another. A connecting arrangement is provided including first and second connecting pieces with complementary interengaging formations that restricts movement of the contactor substrate relative to the distribution board substrate in a tangential direction.
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7.发明授权公开(公告)号：US09874596B2
公开(公告)日：2018-01-23
申请号：US14772304
申请日：2014-03-10
IPC分类号： G01R31/26 , H01L21/66 , H01L29/16 , H01L29/32 , H01L29/66 , H01L29/78 , G01R31/28 , H01L21/56
CPC分类号： G01R31/2632 , G01R31/2648 , G01R31/2855 , G01R31/2877 , H01L21/565 , H01L22/14 , H01L29/1608 , H01L29/32 , H01L29/66068 , H01L29/7805 , H01L2924/0002
摘要： The present invention provides a method for manufacturing silicon carbide semiconductor apparatus including a testing step of testing a PN diode for the presence or absence of stacking faults in a relatively short time and an energization test apparatus. The present invention sets the temperature of a bipolar semiconductor element at 150° C. or higher and 230° C. or lower, causes a forward current having a current density of 120 [A/cm2] or more and 400 [A/cm2] or less to continuously flow through the bipolar semiconductor element, calculates, in a case where a forward resistance of the bipolar semiconductor element through which the forward current flows reaches a saturation state, the degree of change in the forward resistance, and determines whether the calculated degree of change is smaller than a threshold value.
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公开(公告)号：US09557369B2
公开(公告)日：2017-01-31
申请号：US13530782
申请日：2012-06-22
申请人： Jifeng Chen , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
发明人： Jifeng Chen , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
IPC分类号： G01R31/28 , G01R31/311
CPC分类号： G01R31/2855 , G01R31/281 , G01R31/2817 , G01R31/2858 , G01R31/2879 , G01R31/311
摘要： Methods for reliability testing include applying a stress voltage to a device under test (DUT); measuring a leakage current across the DUT; triggering measurement of optical emissions from the DUT based on the timing of the measurement of the leakage current; and correlating measurements of the leakage current with measurements of the optical emissions to determine a time and location of a defect occurrence within the DUT by locating instances of increased noise in the leakage current that correspond in time with instances of increased optical emissions.
摘要翻译： 可靠性测试方法包括对被测设备（DUT）施加应力电压; 测量穿过DUT的漏电流; 基于泄漏电流测量的定时，触发DUT测量光发射; 并且将泄漏电流的测量与光发射的测量值相关联，以通过将泄漏电流中增加的噪声的实例定位在与增加的光发射的情况相对应的时间内来确定DUT内的缺陷发生的时间和位置。
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公开(公告)号：US09541607B2
公开(公告)日：2017-01-10
申请号：US13966316
申请日：2013-08-14
申请人： AVX Corporation
CPC分类号： G01R31/016 , G01R31/02 , G01R31/028 , G01R31/2849 , G01R31/2855 , G01R31/36 , H01G9/008 , H01G9/042 , H01G9/15 , H01L22/00 , H01L28/00
摘要： A method of iteratively screening a sample of electrolytic capacitors having a predetermined rated voltage is provided. The method can include measuring a first leakage current of a first set of capacitors, calculating a first mean leakage current therefrom, and removing capacitors from the first set having a first leakage current equal to or above a first predetermined value, thereby forming a second set of capacitors. The second set can be subjected to a burn in heat treatment where a test voltage can be applied, then a second leakage current of the second set of capacitors can be measured and a second mean leakage current can be calculated. Capacitors having a second leakage current equal to or above a second predetermined value can be removed from the second set, forming a third set of capacitors. Because of such iterative screening, the capacitors in the third set have low failure rates.
摘要翻译： 提供了一种迭代地筛选具有预定额定电压的电解电容器样品的方法。 该方法可以包括测量第一组电容器的第一泄漏电流，从其计算第一平均泄漏电流，以及从具有等于或高于第一预定值的第一泄漏电流的第一组中去除电容器，从而形成第二组 的电容器。 第二组可以在可以施加测试电压的热处理中进行燃烧，然后可以测量第二组电容器的第二泄漏电流，并且可以计算第二平均泄漏电流。 具有等于或高于第二预定值的第二泄漏电流的电容器可以从第二组移除，形成第三组电容器。 由于这种迭代筛选，第三组中的电容器具有低故障率。
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公开(公告)号：US09448277B2
公开(公告)日：2016-09-20
申请号：US13544080
申请日：2012-07-09
申请人： Jifeng Chen , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
发明人： Jifeng Chen , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
IPC分类号： G01R31/28 , G01R31/311
CPC分类号： G01R31/2855 , G01R31/281 , G01R31/2817 , G01R31/2858 , G01R31/2879 , G01R31/311
摘要： Systems for reliability testing include a picometer configured to measure a leakage current across a device under test (DUT); a camera configured to measure optical emissions from the DUT based on a timing of the measurement of the leakage current; and a test system configured to apply a stress voltage to the DUT and to correlate the leakage current with the optical emissions using a processor to determine a time and location of a defect occurrence within the DUT by locating instances of increased noise in the leakage current that correspond in time with instances of increased optical emissions.
摘要翻译： 用于可靠性测试的系统包括配置成测量被测器件（DUT）上的漏电流的波长计; 配置为基于所述泄漏电流的测量的定时来测量来自所述DUT的光发射的照相机; 以及被配置为向DUT施加应力电压并且使用处理器将泄漏电流与光发射相关联的测试系统，以通过定位泄漏电流中增加的噪声的实例来确定DUT内的缺陷发生的时间和位置， 在时间上对应于增加的光发射的情况。
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