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公开(公告)号：US20070279034A1
公开(公告)日：2007-12-06
申请号：US10591891
申请日：2005-02-04
申请人： Jeong-Jin Roh , Sung Jin Park
发明人： Jeong-Jin Roh , Sung Jin Park
IPC分类号： H02M3/157
CPC分类号： H02M3/157
摘要： A digital DC-DC converter is implemented using first-order delta-sigma modulation, rather than A/D conversion. In the DC-DC converter, a PWM generator converts an input DC voltage to a preset level DC voltage according to an input PWM signal. A converter converts the DC voltage from the PWM generator to a preset level voltage. A delta-sigma modulator converts a feedback voltage Vfd corresponding to the output voltage Vout of the converter to a 1-bit digital voltage Vo according to a preset reference voltage Vref. A counter counts logic 1's in 1-bit digital voltage signals Vo from the delta-sigma modulator. A delay controller controls a high-level delay time according to the number of logic 1's counted by the counter and transfers a PWM signal having the controlled high-level delay time to the PWM generator.
摘要翻译： 使用一阶Δ-Σ调制实现数字DC-DC转换器，而不是A / D转换。 在DC-DC转换器中，PWM发生器根据输入的PWM信号将输入直流电压转换为预设电平的直流电压。 A转换器将来自PWM发生器的直流电压转换为预设电平电压。 Δ-Σ调制器根据预设的参考电压Vref将对应于转换器的输出电压Vout的反馈电压Vfd转换为1位数字电压Vo。 计数器对来自delta-Σ调制器的1位数字电压信号Vo中的逻辑1进行计数。 延迟控制器根据计数器计数的逻辑1的数量控制高电平延迟时间，并将具有受控高电平延迟时间的PWM信号传送到PWM发生器。
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公开(公告)号：US07554308B2
公开(公告)日：2009-06-30
申请号：US10591891
申请日：2005-02-04
申请人： Jeong-Jin Roh , Sung-Jin Park
发明人： Jeong-Jin Roh , Sung-Jin Park
IPC分类号： H02M3/157
CPC分类号： H02M3/157
摘要： A digital DC-DC converter is implemented using first-order delta-sigma modulation, rather than A/D conversion. In the DC-DC converter, a PWM generator converts an input DC voltage to a preset level DC voltage according to an input PWM signal. A converter converts the DC voltage from the PWM generator to a preset level voltage. A delta-sigma modulator converts a feedback voltage Vfd corresponding to the output voltage Vout of the converter to a 1-bit digital voltage Vo according to a preset reference voltage Vref. A counter counts logic 1's in 1-bit digital voltage signals Vo from the delta-sigma modulator. A delay controller controls a high-level delay time according to the number of logic 1's counted by the counter and transfers a PWM signal having the controlled high-level delay time to the PWM generator.
摘要翻译： 使用一阶Δ-Σ调制实现数字DC-DC转换器，而不是A / D转换。 在DC-DC转换器中，PWM发生器根据输入的PWM信号将输入直流电压转换为预设电平的直流电压。 A转换器将来自PWM发生器的直流电压转换为预设电平电压。 Δ-Σ调制器根据预设的参考电压Vref将对应于转换器的输出电压Vout的反馈电压Vfd转换为1位数字电压Vo。 计数器对来自delta-Σ调制器的1位数字电压信号Vo中的逻辑1进行计数。 延迟控制器根据计数器计数的逻辑1的数量控制高电平延迟时间，并将具有受控高电平延迟时间的PWM信号传送到PWM发生器。
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公开(公告)号：US08593319B2
公开(公告)日：2013-11-26
申请号：US13611451
申请日：2012-09-12
申请人： Min-Ho Kwon , Seog-Heon Ham , Jeong-Jin Roh , Jae-Jin Yeo , Yong-Suk Choi , Gun-Hee Han
发明人： Min-Ho Kwon , Seog-Heon Ham , Jeong-Jin Roh , Jae-Jin Yeo , Yong-Suk Choi , Gun-Hee Han
IPC分类号： H03M3/00
摘要： An image sensor includes a delta-sigma analog-to-digital converter (ADC) including a delta-sigma modulator (DSM) and a voltage adjusting circuit. The DSM is configured to perform delta-sigma modulation on an analog signal from a unit pixel. The delta-sigma ADC is configured to convert the analog signal to a digital signal. The voltage adjusting circuit includes a replica inverter having a same configuration as at least one inverter included in the DSM. The voltage adjusting circuit is configured to adjust a power supply voltage and an input voltage provided to the at least one inverter based on a current flowing in the replica inverter.
摘要翻译： 图像传感器包括包括Δ-Σ调制器（DSM）和电压调节电路的Δ-Σ模数转换器（ADC）。 DSM被配置为对来自单位像素的模拟信号执行Δ-Σ调制。 Δ-ΣADC配置为将模拟信号转换为数字信号。 电压调整电路包括具有与DSM中包括的至少一个反相器相同配置的复制反相器。 电压调整电路被配置为基于在复制逆变器中流动的电流来调整提供给至少一个逆变器的电源电压和输入电压。
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