摘要:
A circuit for providing a write current having a programmably adjustable duty cycle in a hard disk drive write channel has a differential pair gain circuit for receiving a data input signal and generating a differential output voltage to provide a differential write signal for generating the write current. First and second programmable current sources are connected to the differential pair gain circuit to create a programmable voltage offset of the differential output voltage to programmably adjust the duty cycle of the write current.
摘要:
The present invention achieves technical advantages as a preamplifier write driver (10) having a varying common-mode output voltage. This varying common-mode output voltage also adjusts the derivative of the common-mode voltage, which is proportional to the amount of current coupled onto the MR head through parasitic capacitance. Currents of a first circuit (Q0,Q3) and a second circuit (Q1,Q2) are matched to overcome process variations and modeling errors. A pair of transresistance amplifiers (16) are driven by control lines (14) to achieve these matched currents.
摘要:
A control circuit to provide a control current to control an amplitude of a write current in a magnetic media drive. The control circuit has an output circuit for providing the control current with an amplitude dependent on a bias voltage. A bias current path provides the bias voltage to the output circuit, and a current diverting circuit is connected to divert current from the bias current path. A programmable ramp voltage generator operates in response to a degauss enable signal, and a voltage-to-current converter receives the programmable ramp voltage to control the current diverting circuit to divert current from the bias current path at a rate determined by the programmable ramp voltage. The bias voltage and the write current decay according to the programmable ramp voltage. The write current decay can be made linear and independent of a beginning write current amplitude.
摘要:
Methods and apparatus for controlling the duration of a pulse in a hard drive write system are disclosed. A disclosed method comprises generating a current pulse, reducing the current of the pulse and conveying a portion of the current pulse to a hard drive write system. In addition, a method is disclosed whereby a portion of the current pulse is truncated.
摘要:
One embodiment of the invention includes a driver circuit. The driver circuit comprises a high-side switch that is activated in response to a positive driver input signal to provide a positive output signal at a driver output. The driver circuit also comprises a low-side switch that is activated in response to a negative driver input signal to provide a negative output signal at the driver output. The positive and negative driver input and output signals can be relative to respective cross-over magnitudes. The driver circuit further comprises at least one impedance-matching device configured to activate the low-side switch in response to a positive signal reflection at the driver output and to activate the high-side switch in response to a negative signal reflection at the driver output.
摘要:
Methods and apparatus for temperature compensation for hard disk drive writer overshoot current are disclosed. A disclosed system comprises creating a first delay based on the temperature of the hard disk drive, creating a second delay based on the temperature of the hard disk drive, and creating a pulse based on the first and second delay.
摘要:
Methods and apparatus for generating a hard drive write signal are here in disclosed. A disclosed method comprises generating a hard drive write signal on an output of a switch based on an edge of the first control signal and reducing the hard drive write signal based on an edge of a second control signal via a second switch.
摘要:
A hard drive write preamplifier includes a first differential pair of PNP BJTs having a first PNP BJT and a second PNP BJT; a first tail current source coupled into emitter of the PNP BJTs of the first differential pair; a second differential pair of NPN BJTs having a first NPN BJT and a second NPN BJT; a second tail current source coupled into the emitters of the NPN BJTs of the second differential pair; wherein a collector of each of the PNP BJTs of the first differential pair are coupled to a corresponding collector the NPN BJTs of the second differential pair; a first shift up PNP BJT having emitter coupled to the collector of a first PNP BJT of the first differential pair; a second shift up PNP BJT having an emitter coupled to the collector of the second PNP BJT of the first differential pair.
摘要:
A control circuit to provide a control current to control an amplitude of a write current in a magnetic media drive. The control circuit has an output circuit for providing the control current with an amplitude dependent on a bias voltage. A bias current path provides the bias voltage to the output circuit, and a current diverting circuit is connected to divert current from the bias current path. A programmable ramp voltage generator operates in response to a degauss enable signal, and a voltage-to-current converter receives the programmable ramp voltage to control the current diverting circuit to divert current from the bias current path at a rate determined by the programmable ramp voltage. The bias voltage and the write current decay according to the programmable ramp voltage. The write current decay can be made linear and independent of a beginning write current amplitude.
摘要:
One embodiment of the invention includes a system for writing data onto a magnetic disk. An output driver provides a first write current through a first output transistor in a first state and provides a second write current through a second output transistor in a second state. The first and second write currents can be provided to a disk write head to store opposing binary values, respectively. A bias current generator switches a first bias current between an intermediate voltage node in the second state and the first control node in the first state, and switches a second bias current between the intermediate voltage node in the first state and the second control node in the second state. The first and second bias currents can be provided to set a bias voltage at the first and second control nodes to bias the first and second output transistors, respectively.