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    DIFFERENTIAL AMPLIFIER CIRCUIT
    3.
    发明申请
    DIFFERENTIAL AMPLIFIER CIRCUIT 有权
    差分放大器电路

    公开(公告)号：US20120139632A1

    公开(公告)日：2012-06-07

    申请号：US13309687

    申请日：2011-12-02

    申请人： Akiko MINEYAMA ,  Yoichi KAWANO ,  Toshihide SUZUKI

    发明人： Akiko MINEYAMA ,  Yoichi KAWANO ,  Toshihide SUZUKI

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45179 ,  H03F1/56 ,  H03F2200/102 ,  H03F2200/387 ,  H03F2203/45318 ,  H03F2203/45332 ,  H03F2203/45654 ,  H03F2203/45688

    摘要： A differential amplifier circuit includes a first/second field effect transistor including a gate coupled to a first/second differential input signal terminal, a source coupled to a reference potential node, and a drain coupled to a first/second differential output signal terminal, a first variable capacitor coupled between the gate of the first field effect transistor and the drain of the second field effect transistor, a second variable capacitor coupled between the gate of the second field effect transistor and the drain of the first field effect transistor, and a first envelope detector configured to detect an envelope of a signal at the first differential output signal terminal or the second differential output signal terminal, the first variable capacitor and/or the second variable capacitor has a capacitance that varies in accordance with an envelope detected by the first envelope detector.

    摘要翻译： 差分放大器电路包括第一/第二场效应晶体管，其包括耦合到第一/第二差分输入信号端子的栅极，耦合到参考电势节点的源极和耦合到第一/第二差分输出信号端子的漏极， 耦合在第一场效应晶体管的栅极和第二场效应晶体管的漏极之间的第一可变电容器，耦合在第二场效应晶体管的栅极和第一场效应晶体管的漏极之间的第二可变电容器，以及第一可变电容器， 包络检测器被配置为检测第一差分输出信号端或第二差分输出信号端的信号包络，第一可变电容和/或第二可变电容具有根据由第一差分输出信号 包络检测器。

    Variable gain amplifier with wide gain variation and wide bandwidth
    4.
    发明授权
    Variable gain amplifier with wide gain variation and wide bandwidth 有权
    具有宽增益变化和宽带宽的可变增益放大器

    公开(公告)号：US07557657B2

    公开(公告)日：2009-07-07

    申请号：US11775105

    申请日：2007-07-09

    申请人： Hoang Duong Quoc ,  Sang Gug Lee ,  Jeong Hoon Kim ,  Tah Joon Park ,  Eung Ju Kim

    发明人： Hoang Duong Quoc ,  Sang Gug Lee ,  Jeong Hoon Kim ,  Tah Joon Park ,  Eung Ju Kim

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45188 ,  H03F3/45632 ,  H03F2200/447 ,  H03F2200/456 ,  H03F2203/45466 ,  H03F2203/45482 ,  H03F2203/45641 ,  H03F2203/45654 ,  H03F2203/45681 ,  H03G1/0023

    摘要： A variable gain amplifier including: a differential amplification unit amplifying and outputting a difference between a first input signal and a second input signal inputted via a first input terminal and a second input terminal, respectively, according to a first bias current of the first input terminal and second input terminal, to a first output terminal and a second output terminal; a diode-connected load unit comprising loads diode-connected to the first output terminal and second output terminal, respectively, the load receiving a second bias current; and a gain control unit controlling a gain between the input terminals and the output terminals of the differential amplification unit by controlling the size of the first bias current and second bias current.

    摘要翻译： 一种可变增益放大器，包括：差分放大单元，根据第一输入端子的第一偏置电流，分别放大并输出经由第一输入端子和第二输入端子输入的第一输入信号和第二输入信号之间的差值 和第二输入端，连接到第一输出端和第二输出端; 二极管连接的负载单元，分别包括负载二极管连接到第一输出端子和第二输出端子，负载接收第二偏置电流; 以及增益控制单元，通过控制第一偏置电流和第二偏置电流的大小来控制差分放大单元的输入端子和输出端子之间的增益。

    ASYMMETRIC RISE/FALL TIME AND DUTY CYCLE CONTROL CIRCUIT
    5.
    发明申请
    ASYMMETRIC RISE/FALL TIME AND DUTY CYCLE CONTROL CIRCUIT 有权
    不对称上升/下降时间和占空比控制电路

    公开(公告)号：US20080079490A1

    公开(公告)日：2008-04-03

    申请号：US11626081

    申请日：2007-01-23

    申请人： The'Linh Nguyen ,  Timothy G. Moran

    发明人： The'Linh Nguyen ,  Timothy G. Moran

    IPC分类号： H03F1/22

    CPC分类号： H03F3/45475 ,  H03F3/45085 ,  H03F2203/45134 ,  H03F2203/45324 ,  H03F2203/45566 ,  H03F2203/45631 ,  H03F2203/45641 ,  H03F2203/45654 ,  H03K5/1565

    摘要： Modules and signal control circuits configured to at least partially compensate for or adjust for asymmetric rise/fall time. The circuit may include a first input node configured to receive a first data signal and a second input node configured to receive a second data signal that is complementary of the first data signal. The circuit may also include a first stage having a first node coupled to the first input node and a second node coupled to the second input node and a second stage having a first node coupled to a third node of the first stage and a second node coupled to a fourth node of the first stage. The second stage may be configured to drive a load such as a laser. The circuit may further include a third input node configured to receive a third data signal and a fourth input node configured to receive a fourth data signal that is the complementary of the third data signal. Additionally, a control stage having a first node coupled the third input node, having a second node coupled to the fourth input node, having a third node coupled to the third node of the first stage and having a fourth node coupled to the fourth node of the first stage.

    摘要翻译： 模块和信号控制电路被配置为至少部分地补偿或调整不对称的上升/下降时间。 电路可以包括被配置为接收第一数据信号的第一输入节点和被配置为接收与第一数据信号互补的第二数据信号的第二输入节点。 电路还可以包括具有耦合到第一输入节点的第一节点和耦合到第二输入节点的第二节点的第一阶段和具有耦合到第一阶段的第三节点的第一节点的第二阶段和耦合到第二节点的第二节点 到第一级的第四个节点。 第二级可以被配置为驱动诸如激光器的负载。 电路还可以包括被配置为接收第三数据信号的第三输入节点和被配置为接收作为第三数据信号的互补的第四数据信号的第四输入节点。 另外，控制级具有耦合第三输入节点的第一节点，具有耦合到第四输入节点的第二节点，具有耦合到第一级的第三节点的第三节点，并且具有耦合到第四节点的第四节点的第四节点 第一阶段

    Input buffer
    6.
    发明授权
    Input buffer 有权
    输入缓冲区

    公开(公告)号：US07348809B2

    公开(公告)日：2008-03-25

    申请号：US11387357

    申请日：2006-03-23

    申请人： Adam B. Eldredge

    发明人： Adam B. Eldredge

    IPC分类号： H03B1/00 ,  H03K3/00

    CPC分类号： H03F3/45183 ,  H03F3/45713 ,  H03F3/45744 ,  H03F2200/375 ,  H03F2203/45008 ,  H03F2203/45212 ,  H03F2203/45654 ,  H03F2203/45702 ,  H03F2203/45722 ,  H04L25/0274 ,  H04L25/0292

    摘要： In one embodiment, the present invention includes an input buffer with a common gate amplifier having input terminals coupled to receive an incoming common mode voltage. The common gate amplifier may be configured to receive the incoming common mode voltage over a wide range of levels extending from a low end lower than a supply voltage of the input buffer to a high end exceeding the supply voltage.

    摘要翻译： 在一个实施例中，本发明包括具有公共栅极放大器的输入缓冲器，其具有耦合以接收输入共模电压的输入端。 公共栅极放大器可以被配置为在从低于输入缓冲器的电源电压的低端延伸到超过电源电压的高端的宽范围的电平范围内接收输入的共模电压。

    Amplifiers and amplifying methods for use in telecommunications devices
    7.
    发明授权
    Amplifiers and amplifying methods for use in telecommunications devices 失效
    用于电信设备的放大器和放大方法

    公开(公告)号：US07133655B2

    公开(公告)日：2006-11-07

    申请号：US10806140

    申请日：2004-03-23

    申请人： Janice Chiu

    发明人： Janice Chiu

    IPC分类号： H04B17/00

    CPC分类号： H04B17/318 ,  H03F2203/45654 ,  H04W52/52

    摘要： A signal strength indicator circuit that includes a first amplifier configured to receive a first input signal from a first mixer and a second input signal from a second mixer;. The circuit also includes a second amplifier configured to receive a first set of differential inputs from the first amplifier. The circuit further includes a third amplifier configured to receive a second set of differential inputs from the second amplifier stage. Even further, the circuit includes an output port for emitting an output signal that is a rectified combination of the first input signal and the second input signal. Also, a method of processing signals input into a signal strength indicator circuit.

    摘要翻译： 信号强度指示器电路，其包括被配置为从第一混频器接收第一输入信号的第一放大器和来自第二混频器的第二输入信号。 电路还包括配置成从第一放大器接收第一组差分输入的第二放大器。 电路还包括配置成从第二放大器级接收第二组差分输入的第三放大器。 另外，该电路包括用于发射作为第一输入信号和第二输入信号的整流组合的输出信号的输出端口。 另外，处理输入信号强度指示电路的信号的方法。

    Wideband constant-gain voltage amplifier
    8.
    发明申请
    Wideband constant-gain voltage amplifier 失效
    宽带恒定增益电压放大器

    公开(公告)号：US20040222852A1

    公开(公告)日：2004-11-11

    申请号：US10434675

    申请日：2003-05-09

    发明人： Yue Wu

    IPC分类号： H03F003/45

    CPC分类号： H03F3/45085 ,  H03F1/302 ,  H03F3/45609 ,  H03F2203/45654

    摘要： A wideband, constant-gain voltage amplifier. An input transistor has a transconductance that is a function of temperature and fabrication process. A transimpedance amplifier is connected to the input transistor. The transimpedance amplifier has a transimpedance that is a function of temperature and process that is substantially the inverse of the function of temperature and fabrication process of the transconductance of the input transistor.

    摘要翻译： 宽带恒定增益电压放大器。 输入晶体管具有作为温度和制造工艺的函数的跨导。 跨阻放大器连接到输入晶体管。 跨阻放大器具有跨温度，其是温度和工艺的函数，其基本上与输入晶体管的跨导温度的温度和制造工艺的功能相反。

    Circuit configuration for producing exponential predistortion for a variable amplifier
    10.
    发明申请
    Circuit configuration for producing exponential predistortion for a variable amplifier 有权
    用于产生可变放大器的指数预失真的电路配置

    公开(公告)号：US20040032298A1

    公开(公告)日：2004-02-19

    申请号：US10639400

    申请日：2003-08-12

    发明人： Martin Tegeler ,  Markus Zannoth

    IPC分类号： H03F003/45

    CPC分类号： H03G7/06 ,  H03F1/3211 ,  H03F3/45098 ,  H03F2200/372 ,  H03F2203/45471 ,  H03F2203/45498 ,  H03F2203/45654

    摘要： A circuit is specified for producing exponential predistortion for a variable amplifier that contains two parallel-connected, controlled current paths, each having a diode that is followed by a differential amplifier stage. The area ratio of the first diode and the second diode is in this case equal to the area ratio of the first transistor and the second transistor in the differential amplifier. Therefore, a current produced on the output side has exponential predistortion in comparison to a control signal that can be applied on the input side. This makes it possible to drive linear amplifiers dB-linearly. The present circuit can be used for radio-frequency purposes and allows good noise characteristics as well as a high degree of insensitivity to process parameter and temperature fluctuations.

    摘要翻译： 一个电路被指定用于产生可变放大器的指数预失真，该可变放大器包含两个并联连接的受控电流路径，每个电路具有二极管，其后面是差分放大器级。 在这种情况下，第一二极管和第二二极管的面积比等于差分放大器中的第一晶体管和第二晶体管的面积比。 因此，与可以施加在输入侧的控制信号相比，在输出侧产生的电流具有指数预失真。 这使得可以线性地驱动线性放大器。 本电路可以用于射频目的，并且允许良好的噪声特性以及对处理参数和温度波动的高度不敏感性。