公开(公告)号：US06225182B1

公开(公告)日：2001-05-01

申请号：US09386132

申请日：1999-08-30

申请人： Jerome Tsu-Rong Chu ,  John D. LaBarre ,  Wen Lin ,  Blair Miller

发明人： Jerome Tsu-Rong Chu ,  John D. LaBarre ,  Wen Lin ,  Blair Miller

IPC分类号： H01L21331

CPC分类号： H01L28/10 ,  H01L23/522 ,  H01L23/5227 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides for a method of manufacturing a simplified high Q inductor substrate and a semiconductor device having that substrate. The method for manufacturing the simplified high Q inductor substrate preferably comprises forming a base substrate over a semiconductor wafer, wherein the base substrate has a given dopant concentration and then forming an epitaxial (EPI) layer over the base substrate. The EPI layer includes epitaxially forming a first doped region in the EPI layer over the base substrate and then epitaxially forming a second doped region in the EPI layer over the first doped region. The first doped region has a dopant concentration greater than the given dopant concentration of the base substrate, and the second doped region has a dopant concentration less than the first doped region.

摘要翻译： 本发明提供一种制造简化的高Q电感器基板的方法和具有该基板的半导体器件。 制造简化的高Q电感器衬底的方法优选地包括在半导体晶片上形成基底衬底，其中基底衬底具有给定的掺杂剂浓度，然后在基底衬底上形成外延（EPI）层。 EPI层包括在基底衬底上的外延形成EPI层中的第一掺杂区域，然后在第一掺杂区域上在EPI层中外延形成第二掺杂区域。 第一掺杂区域具有大于基底衬底的给定掺杂剂浓度的掺杂剂浓度，并且第二掺杂区域具有小于第一掺杂区域的掺杂剂浓度。

公开(公告)号：US06410974B1

公开(公告)日：2002-06-25

申请号：US09800049

申请日：2001-03-05

申请人： Jerome Tsu-Rong Chu ,  John D. LaBarre ,  Wen Lin ,  Blair Miller

发明人： Jerome Tsu-Rong Chu ,  John D. LaBarre ,  Wen Lin ,  Blair Miller

IPC分类号： H01L2976

摘要： The present invention provides for a method of manufacturing a simplified high Q inductor substrate and a semiconductor device having that substrate. The method for manufacturing the simplified high Q inductor substrate preferably includes forming a base substrate over a semiconductor wafer, wherein the base substrate has a given dopant concentration and then forming an epitaxial (EPI) layer over the base substrate. The EPI layer includes epitaxially forming a first doped region in the EPI layer over the base substrate and then epitaxially forming a second doped region in the EPI layer over the first doped region. The first doped region has a dopant concentration greater than the given dopant concentration of the base substrate, and the second doped region has a dopant concentration less than the first doped region.

公开(公告)号：US5425846A

公开(公告)日：1995-06-20

申请号：US103726

申请日：1993-08-09

申请人： Jeffrey T. Koze ,  Drew J. Kuhn ,  John D. LaBarre

发明人： Jeffrey T. Koze ,  Drew J. Kuhn ,  John D. LaBarre

IPC分类号： H01L21/304 ,  H01L21/20 ,  H01L21/311 ,  B44C1/22

CPC分类号： H01L21/31116 ,  Y10S438/928

摘要： Perimeter material is removed from substrates by stacking the substrates and subjecting them to a plasma etch. In an exemplary application, the perimeter of a silicon wafer dielectric cap (typically silicon nitride) is removed by stacking the wafers in intimate contact, and etching the wafers in a barrel etcher. A well-controlled removal of the cap perimeter is obtained, allowing for a smooth epitaxial deposition at the water edge in a subsequent operation. An additional benefit is smoothing of the substrate edge contour, which reduces scratching of wafer cassettes and other handling equipment.

摘要翻译： 通过堆叠衬底并对其进行等离子体蚀刻，从衬底去除周边材料。 在示例性应用中，硅晶片电介质盖（通常为氮化硅）的周边通过紧密接触堆叠晶片并在桶蚀刻器中蚀刻晶片来去除。 获得良好控制的盖边缘的移除，允许在随后的操作中在水边缘处的平滑的外延沉积。 另外的优点是平滑基板边缘轮廓，这减少了晶片盒和其他处理设备的刮擦。