INSTRUCTIONS FOR STORING IN GENERAL PURPOSE REGISTERS ONE OF TWO SCALAR CONSTANTS BASED ON THE CONTENTS OF VECTOR WRITE MASKS
    1.
    发明申请
    INSTRUCTIONS FOR STORING IN GENERAL PURPOSE REGISTERS ONE OF TWO SCALAR CONSTANTS BASED ON THE CONTENTS OF VECTOR WRITE MASKS 审中-公开
    用于存储一般用途注册表的指令基于矢量写掩码内容的两个标量常数之一

    公开(公告)号:US20140297991A1

    公开(公告)日:2014-10-02

    申请号:US13994060

    申请日:2011-12-22

    IPC分类号: G06F9/30

    摘要: According to one embodiment, an occurrence of an instruction is fetched. The instruction's format specifies its only source operand from a single vector write mask register, and specifies as its destination a single general purpose register. In addition, the instruction's format includes a first field whose contents selects the single vector write mask register, and includes a second field whose contents selects the single general purpose register. The source operand is a write mask including a plurality of one bit vector write mask elements that correspond to different multi-bit data element positions within architectural vector registers. The method also includes, responsive to executing the single occurrence of the single instruction, storing data in the single general purpose register such that its contents represent either a first or second scalar constant based on whether the plurality of one bit vector write mask elements in the source operand are all zero.

    摘要翻译: 根据一个实施例,获取指令的发生。 指令的格式仅指定单个向量写入掩码寄存器的源操作数,并将其指定为单个通用寄存器。 此外,指令的格式包括其内容选择单向量写入掩码寄存器的第一字段,并且包括其内容选择单个通用寄存器的第二字段。 源操作数是包括对应于架构向量寄存器内的不同多位数据元素位置的多个一位向量写入掩码元素的写入掩码。 该方法还包括:响应于执行单个指令的单次发生,将数据存储在单个通用寄存器中,使得其内容基于第一或第二标量常数是否基于第 源操作数全部为零。

    Instructions for storing in general purpose registers one of two scalar constants based on the contents of vector write masks

    公开(公告)号:US10157061B2

    公开(公告)日:2018-12-18

    申请号:US13994060

    申请日:2011-12-22

    IPC分类号: G06F9/30

    摘要: According to one embodiment, an occurrence of an instruction is fetched. The instruction's format specifies its only source operand from a single vector write mask register, and specifies as its destination a single general purpose register. In addition, the instruction's format includes a first field whose contents selects the single vector write mask register, and includes a second field whose contents selects the single general purpose register. The source operand is a write mask including a plurality of one bit vector write mask elements that correspond to different multi-bit data element positions within architectural vector registers. The method also includes, responsive to executing the single occurrence of the single instruction, storing data in the single general purpose register such that its contents represent either a first or second scalar constant based on whether the plurality of one bit vector write mask elements in the source operand are all zero.

    Method and system for persistently cached, copy-on-write view of revision control trees
    5.
    发明授权
    Method and system for persistently cached, copy-on-write view of revision control trees 有权
    版本控制树的持久缓存,写时复制视图的方法和系统

    公开(公告)号:US09069792B1

    公开(公告)日:2015-06-30

    申请号:US12196937

    申请日:2008-08-22

    IPC分类号: G06F17/30

    CPC分类号: G06F17/3023 G06F17/30132

    摘要: A method and system for efficient usage of revision control system resources by providing a client-based file system tree based on managed cache resources is provided. The managed cache resources include both a persistent, disk-based cache that maintains copies of requested file data from a repository server and an ordered tree data structure-based metadata cache for tracking file metadata across revisions. Embodiments of the present invention further maintain in the data cache data related only to specifically requested files. Embodiments of the present invention further track a range of versions of the file system tree for which particular file versions are applicable, so that unnecessary downloading to the client of unchanged files is avoided. Thus, file data and metadata are only requested from a repository server when needed and only a single version of a file is maintained until a modification to that file is made.

    摘要翻译: 提供了一种通过基于管理的缓存资源提供基于客户端的文件系统树来有效利用版本控制系统资源的方法和系统。 托管缓存资源包括一个持久的基于磁盘的高速缓存,它保存来自存储库服务器的所请求的文件数据的副本,以及基于有序的树状数据结构的元数据高速缓存,用于跨修订版跟踪文件元数据。 本发明的实施例进一步维护仅与特定请求的文件相关的数据高速缓存数据。 本发明的实施例进一步跟踪可应用特定文件版本的文件系统树的版本范围,从而避免不必要地向客户端下载未改变的文件。 因此,只有在需要时才从存储库服务器请求文件数据和元数据,并且仅维护文件的单个版本,直到对该文件进行修改。

    Faster clears for three-dimensional modeling applications
    6.
    发明授权
    Faster clears for three-dimensional modeling applications 有权
    更快地清除三维建模应用程序

    公开(公告)号:US07898549B1

    公开(公告)日:2011-03-01

    申请号:US11954543

    申请日:2007-12-12

    摘要: A graphics processing subsystem defines a bounding area as the portion of the display buffer and other memory buffers occupied by one or more rendered objects. When clearing the memory buffers, only the portions of the buffers corresponding to the bounding area need to be cleared. A graphics pipeline includes a bounding area memory to store bounding area values. The bounding area values are modified during rendering so that each rendered primitive falls within the bounding area values. The graphics processing subsystem clears a portion of the memory buffer in response to a clear command specifying a bounding area. The clear command may include a set of bounding area values defining the bounding area, or alternatively a reference to the bounding area memory. For applications that draw objects in isolation, the bounding area will be smaller than the window, resulting in a decreased time requirement for clearing the memory buffer.

    摘要翻译: 图形处理子系统将边界区域定义为由一个或多个渲染对象占据的显示缓冲器和其他存储器缓冲器的部分。 清除存储器缓冲区时,只需要清除对应于边界区域的缓冲区的部分。 图形管线包括用于存储边界区域值的边界区域存储器。 在渲染期间修改边界区域值,使得每个渲染的图元都落在边界区域值内。 响应于指定边界区域的清除命令,图形处理子系统清除存储器缓冲器的一部分。 清除命令可以包括定义边界区域的一组边界区域值,或者替代地对边界区域存储器的引用。 对于孤立绘制对象的应用程序,边界区域将小于窗口,导致清除内存缓冲区所需的时间减少。

    Faster clears for three-dimensional modeling applications
    7.
    发明授权
    Faster clears for three-dimensional modeling applications 有权
    更快地清除三维建模应用程序

    公开(公告)号:US07528839B1

    公开(公告)日:2009-05-05

    申请号:US10641279

    申请日:2003-08-13

    摘要: A graphics processing subsystem defines a bounding area as the portion of the display buffer and other memory buffers occupied by one or more rendered objects. When clearing the memory buffers, only the portions of the buffers corresponding to the bounding area need to be cleared. A graphics pipeline includes a bounding area memory to store bounding area values. The bounding area values are modified during rendering so that each rendered primitive falls within the bounding area values. The graphics processing subsystem clears a portion of the memory buffer in response to a clear command specifying a bounding area. The clear command may include a set of bounding area values defining the bounding area, or alternatively a reference to the bounding area memory. For applications that draw objects in isolation, the bounding area will be smaller than the window, resulting in a decreased time requirement for clearing the memory buffer.

    摘要翻译: 图形处理子系统将边界区域定义为由一个或多个渲染对象占据的显示缓冲器和其他存储器缓冲器的部分。 清除存储器缓冲区时,只需要清除对应于边界区域的缓冲区的部分。 图形管线包括用于存储边界区域值的边界区域存储器。 在渲染期间修改边界区域值,使得每个渲染的图元都落在边界区域值内。 响应于指定边界区域的清除命令,图形处理子系统清除存储器缓冲器的一部分。 清除命令可以包括定义边界区域的一组边界区域值,或者替代地对边界区域存储器的引用。 对于孤立绘制对象的应用程序,边界区域将小于窗口,导致清除内存缓冲区所需的时间减少。

    Method and system for transferring data between a requesting program and a hardware device
    8.
    发明授权
    Method and system for transferring data between a requesting program and a hardware device 有权
    用于在请求程序和硬件设备之间传送数据的方法和系统

    公开(公告)号:US07356621B1

    公开(公告)日:2008-04-08

    申请号:US10669805

    申请日:2003-09-23

    IPC分类号: G06F13/28 G06F13/00

    CPC分类号: G06F13/102

    摘要: Transferring data between a requesting program and a hardware device. An program requests a pre-allocation of non-pageable memory. The program requests a transfer via a direct memory access (DMA) from the hardware device into the non-pageable memory. The requesting program is notified when the DMA is complete. The requesting program reads the data from the non-pageable memory. A determination may be made whether a range of addresses specified in the DMA request is within the pre-allocated range of non-pageable memory. If the range of addresses is within the pre-allocated non-pageable memory, the data transfer involves fewer transfers between system memory and the CPU than if the range of addresses is outside the pre-allocated non-pageable memory.

    摘要翻译: 在请求程序和硬件设备之间传送数据。 程序请求预分配不可分页内存。 该程序请求通过直接存储器访问(DMA)从硬件设备传输到非可页面存储器。 当DMA完成时通知请求程序。 请求程序从非可页面存储器读取数据。 可以确定DMA请求中指定的地址范围是否在非可分页存储器的预分配范围内。 如果地址范围在预先分配的非可浏览存储器内,则数据传输涉及在系统存储器和CPU之间的传输量较之如果地址范围在预先分配的非可浏览存储器之外。

    Antialiasing using hybrid supersampling-multisampling
    9.
    发明授权
    Antialiasing using hybrid supersampling-multisampling 有权
    使用混合超采样多采样的抗混叠

    公开(公告)号:US06967663B1

    公开(公告)日:2005-11-22

    申请号:US10658056

    申请日:2003-09-08

    IPC分类号: G06T3/40 G06T15/50 G09G5/00

    CPC分类号: G06T11/40

    摘要: Hybrid sampling of pixels of an image involves generating shading values at multiple shading sample locations and generating depth values at multiple depth sample locations, with the number of depth sample locations exceeding the number of shading sample locations. Each shading sample location is associated with one or more of the depth sample locations. Generation and filtering of hybrid sampled pixel data can be done within a graphics processing system, transparent to an application that provides image data.

    摘要翻译: 图像的像素的混合采样涉及在多个阴影采样位置处生成阴影值,并在多个深度采样位置生成深度值,深度采样位置的数量超过阴影采样位置的数量。 每个阴影样本位置与一个或多个深度样本位置相关联。 混合采样像素数据的生成和滤波可以在对提供图像数据的应用程序透明的图形处理系统内完成。