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    DYNAMIC RANDOM ACCESS MEMORY HAVING INTERNAL BUILT-IN SELF-TEST WITH INITIALIZATION
    1.
    发明申请
    DYNAMIC RANDOM ACCESS MEMORY HAVING INTERNAL BUILT-IN SELF-TEST WITH INITIALIZATION 有权
    具有初始化内部自建自动测试功能的动态随机存取记忆

    公开(公告)号：US20110066903A1

    公开(公告)日：2011-03-17

    申请号：US12559870

    申请日：2009-09-15

    申请人： Jim Foster, SR. ,  Sumeet Kochar ,  Suzanne M. Michelich ,  Jacques B. Taylor

    发明人： Jim Foster, SR. ,  Sumeet Kochar ,  Suzanne M. Michelich ,  Jacques B. Taylor

    IPC分类号： G11C29/12 ,  G06F1/26 ,  G06F11/27 ,  H03M13/05 ,  G06F11/10

    CPC分类号： G06F1/206 ,  G11C11/401 ,  G11C29/16

    摘要： A method for self-contained testing within a DRAM comprises the DRAM receiving an instruction from an external processor to test a memory core on the DRAM, and the DRAM self-testing the memory core with one or more BIST pattern stored in a multipurpose register on the DRAM. Optionally, the step of self-testing may include writing the BIST pattern into all locations of the memory core, reading each location of the memory core, and comparing the content read from each location of the memory core with the BIST pattern, wherein a negative comparison indicates a failure has occurred. In a further option, the method may further comprise, after testing the DRAM, initializing the DRAM with an INIT pattern stored in the multipurpose register on the DRAM.

    摘要翻译： 一种用于在DRAM内部进行自包含测试的方法包括：DRAM从外部处理器接收指令以测试DRAM上的存储器核心，并且DRAM利用存储在多用途寄存器中的一个或多个BIST模式自身测试存储器核心 DRAM。 可选地，自检的步骤可以包括将BIST模式写入存储器核心的所有位置，读取存储器核心的每个位置，以及将从存储器核心的每个位置读取的内容与BIST模式进行比较，其中负值 比较表明发生了故障。 在另一个选择中，该方法还可以包括在测试DRAM之后，用存储在DRAM上的多用途寄存器中的INIT模式初始化DRAM。

    Fault injection in dynamic random access memory modules for performing built-in self-tests
    3.
    发明授权
    Fault injection in dynamic random access memory modules for performing built-in self-tests 有权
    用于执行内置自检的动态随机存取存储器模块中的故障注入

    公开(公告)号：US07827445B2

    公开(公告)日：2010-11-02

    申请号：US11960489

    申请日：2007-12-19

    申请人： Jimmy G. Foster, Sr. ,  Nickolaus J. Gruendler ,  Suzanne M. Michelich ,  Jacques B. Taylor

    发明人： Jimmy G. Foster, Sr. ,  Nickolaus J. Gruendler ,  Suzanne M. Michelich ,  Jacques B. Taylor

    IPC分类号： G06F11/00 ,  G06F11/273

    CPC分类号： G11C29/02 ,  G11C5/04 ,  G11C11/401 ,  G11C29/022 ,  G11C29/024 ,  G11C29/025 ,  G11C29/16 ,  G11C29/44 ,  G11C29/56008

    摘要： Fault injection in dynamic random access memory (‘DRAM’) modules for performing built-in self-tests (‘BISTs’) including establishing, in the mode registers of the DRAM modules by the memory controller through the shared address bus, an injection of a fault into one or more signal lines of a DRAM module, the fault characterized by a fault type; writing data by the memory controller through a data bus to the DRAM modules, the data identifying a particular DRAM module; and responsive to receiving the data, injecting, by the particular DRAM module, the fault characterized by the fault type into the one or more signal lines of the particular DRAM module.

    摘要翻译： 动态随机存取存储器（“DRAM”）模块中的故障注入用于执行内置的自检（“BIST”），包括通过共享地址总线在存储器控制器的DRAM模块的模式寄存器中建立注入 故障成为DRAM模块的一条或多条信号线，故障特征为故障类型; 由存储器控制器通过数据总线向DRAM模块写入数据，识别特定DRAM模块的数据; 并且响应于接收到所述数据，由所述特定DRAM模块将由故障类型表征的故障注入到所述特定DRAM模块的所述一个或多个信号线中。

    Fault Injection In Dynamic Random Access Memory Modules For Performing Built-In Self-Tests
    4.
    发明申请
    Fault Injection In Dynamic Random Access Memory Modules For Performing Built-In Self-Tests 有权
    用于执行内置自检的动态随机存取存储器模块中的故障注入

    公开(公告)号：US20090164846A1

    公开(公告)日：2009-06-25

    申请号：US11960489

    申请日：2007-12-19

    申请人： Jimmy G. Foster, SR. ,  Nickolaus J. Gruendler ,  Suzanne M. Michelich ,  Jacques B. Taylor

    发明人： Jimmy G. Foster, SR. ,  Nickolaus J. Gruendler ,  Suzanne M. Michelich ,  Jacques B. Taylor

    IPC分类号： G06F11/00 ,  G06F11/07

    CPC分类号： G11C29/02 ,  G11C5/04 ,  G11C11/401 ,  G11C29/022 ,  G11C29/024 ,  G11C29/025 ,  G11C29/16 ,  G11C29/44 ,  G11C29/56008

    摘要： Fault injection in dynamic random access memory (‘DRAM’) modules for performing built-in self-tests (‘BISTs’) including establishing, in the mode registers of the DRAM modules by the memory controller through the shared address bus, an injection of a fault into one or more signal lines of a DRAM module, the fault characterized by a fault type; writing data by the memory controller through a data bus to the DRAM modules, the data identifying a particular DRAM module; and responsive to receiving the data, injecting, by the particular DRAM module, the fault characterized by the fault type into the one or more signal lines of the particular DRAM module.

    摘要翻译： 动态随机存取存储器（“DRAM”）模块中的故障注入用于执行内置的自检（“BIST”），包括通过共享地址总线在存储器控制器的DRAM模块的模式寄存器中建立注入 故障成为DRAM模块的一条或多条信号线，故障特征为故障类型; 由存储器控制器通过数据总线向DRAM模块写入数据，识别特定DRAM模块的数据; 并且响应于接收到所述数据，由所述特定DRAM模块将由故障类型表征的故障注入到所述特定DRAM模块的所述一个或多个信号线中。