Combined command and response on-chip data interface for a computer system chipset
    1.
    发明授权
    Combined command and response on-chip data interface for a computer system chipset 失效
    用于计算机系统芯片组的命令和响应片上数据接口

    公开(公告)号:US07519755B2

    公开(公告)日:2009-04-14

    申请号:US10964884

    申请日:2004-10-14

    IPC分类号: G06F13/00

    CPC分类号: G06F13/4273

    摘要: An integrated circuit chip, particularly a southbridge, is provided that has a first and a second circuit unit. Each circuit unit can send requests to the other one and send back a response when receiving a request that requires a response. The first circuit unit is connected to the second circuit unit to send to the second circuit unit request data relating to a request to be sent by the first circuit unit and response data relating to a response to be sent by the first circuit unit over a shared signal line.

    摘要翻译: 提供具有第一和第二电路单元的集成电路芯片,特别是南桥。 每个电路单元可以向另一个电路单元发送请求,并在接收到需要响应的请求时发送响应。 第一电路单元连接到第二电路单元,以向第二电路单元发送与由第一电路单元发送的请求相关的数据,以及与第一电路单元通过共享的要发送的响应有关的响应数据 信号线。

    Message based interrupt table
    2.
    发明申请
    Message based interrupt table 有权
    基于消息的中断表

    公开(公告)号:US20060047877A1

    公开(公告)日:2006-03-02

    申请号:US11011511

    申请日:2004-12-14

    IPC分类号: G06F13/24

    CPC分类号: G06F13/24

    摘要: An interrupt processing technique is provided where an interrupt message is sent to an interrupt controller of a processor in response to an interrupt request from an individual device. The interrupt message comprises a memory address and interrupt status information. The memory address is specifically allocated to the device that has issued the interrupt request. The interrupt status information indicates an interrupt status of the device. An interrupt table that is stored in the memory is updated by the interrupt controller using the interrupt status information comprised in the interrupt message. The interrupt table holds device specific interrupt statuses. Updating the interrupt table comprises addressing the memory using the memory address in the interrupt message.

    摘要翻译: 提供一种中断处理技术,其中响应于来自单个设备的中断请求将中断消息发送到处理器的中断控制器。 中断消息包括存储器地址和中断状态信息。 存储器地址被专门分配给发出中断请求的设备。 中断状态信息表示设备的中断状态。 存储在存储器中的中断表由中断控制器使用中断消息中包含的中断状态信息进行更新。 中断表保存设备特定的中断状态。 更新中断表包括使用中断消息中的存储器地址寻址存储器。

    Retry mechanism for blocking interfaces
    3.
    发明授权
    Retry mechanism for blocking interfaces 有权
    阻塞接口的重试机制

    公开(公告)号:US07016994B2

    公开(公告)日:2006-03-21

    申请号:US10285935

    申请日:2002-11-01

    IPC分类号: G06F13/14

    CPC分类号: G06F13/36

    摘要: An improved interface technology is provided that may be applied to PCI (Peripheral Component Interconnect) devices connected to a southbridge. Requests are received from at least one requestor. The request require responses to be sent back to the respective requestor. The requests are placed by the respective requestor by asserting a request signal, and the request signal is deasserted by the respective requestor when a response is sent back. A retry request may be sent to the current requestor for requesting the current requestor to deassert its request signal although a response has not yet been sent back, and to reassert the request signal later. Together with the retry request, a ready signal is sent indicating whether the request could be processed. This allows the requestor to modify its request when retrying it, if the request was not yet processed.

    摘要翻译: 提供了可以应用于连接到南桥的PCI(外围组件互连)设备的改进的接口技术。 从至少一个请求者收到请求。 请求需要将响应发回给相应的请求者。 请求由相应的请求者通过断言请求信号来放置,并且当发送回应时,请求信号由相应的请求者解除断言。 可以向当前请求者发送重试请求,以请求当前请求者解除其请求信号,尽管响应尚未被发送回来,并且稍后重新发送请求信号。 与重试请求一起发送就绪信号,指示是否可以处理该请求。 这允许请求者在重试时修改其请求,如果请求尚未处理。

    Method and apparatus for passing device configuration information to a shared controller
    4.
    发明授权
    Method and apparatus for passing device configuration information to a shared controller 有权
    将设备配置信息传递给共享控制器的方法和装置

    公开(公告)号:US06671748B1

    公开(公告)日:2003-12-30

    申请号:US09904374

    申请日:2001-07-11

    IPC分类号: G06F1300

    CPC分类号: G06F13/387

    摘要: A method and apparatus for passing device configuration information to a shared controller. In one embodiment, a host controller may be configured to read configuration from one or more peripheral devices coupled to a serial bus. The peripheral devices may include coder/decoder (codec) circuitry, and may be implemented using a riser card. The host controller may employ one or more of several different techniques in order to read configuration information from the peripheral device. The configuration information at a minimum includes a device identifier, which may identify the vendor and the function of the device. Additional information needed to configure the device to communicate over the peripheral bus may also be obtained with a read of the device, or various lookup mechanisms, such as a lookup table or a tree-like data structure. After configuration information has been obtained for each device coupled to the bus, the host controller may dynamically configure each of the devices for communication over the bus, thereby allowing the flexibility to enumerate riser cards and add new functions through peripheral devices to the computer system in which the bus is implemented.

    摘要翻译: 一种用于将设备配置信息传递到共享控制器的方法和装置。 在一个实施例中,主机控制器可以被配置为从耦合到串行总线的一个或多个外围设备读取配置。 外围设备可以包括编码器/解码器(编解码器)电路,并且可以使用转接卡来实现。 主机控制器可以采用几种不同技术中的一种或多种,​​以便从外围设备读取配置信息。 配置信息至少包括设备标识符,其可以标识供应商和设备的功能。 通过设备的读取或诸如查找表或树状数据结构的各种查找机制也可以获得将设备配置成通过外围总线进行通信所需的附加信息。 在针对耦合到总线的每个设备获得配置信息之后,主机控制器可以动态地配置每个设备以通过总线进行通信,从而允许灵活地枚举转接卡并且通过外围设备将新功能添加到计算机系统 总线实施。

    Buffering non-posted read commands and responses
    5.
    发明授权
    Buffering non-posted read commands and responses 有权
    缓冲非发布的读取命令和响应

    公开(公告)号:US08244950B2

    公开(公告)日:2012-08-14

    申请号:US10285931

    申请日:2002-11-01

    IPC分类号: G06F3/00 G06F5/00 G06F13/36

    CPC分类号: G06F13/4059

    摘要: An improved interface technique for use in a southbridge or I/O hub or in similar devices is provided where non-posted read requests are received from at least one requestor, and upstream commands based on these requests are transmitted. Response data is received in reply to commands that were previously transmitted, and responses are transmitted to the at least one requester based on the response data. A buffer unit is provided for storing command identification data that identifies commands that were already transmitted or that are still to be transmitted, and response availability data that specifies response data that has been received by the receive engine. The improvement may enable multiple outstanding read requests.

    摘要翻译: 提供了一种在南桥或I / O集线器或类似设备中使用的改进的接口技术,其中从至少一个请求者接收非发布的读取请求,并且发送基于这些请求的上行命令。 接收响应数据以回复先前发送的命令,并且响应基于响应数据被发送到至少一个请求者。 提供缓冲单元,用于存储识别已发送或尚待发送的命令的命令识别数据,以及指定已被接收引擎接收到的响应数据的响应可用性数据。 改进可能会使多个未完成的读取请求。

    Message based interrupt table
    6.
    发明授权
    Message based interrupt table 有权
    基于消息的中断表

    公开(公告)号:US07257658B2

    公开(公告)日:2007-08-14

    申请号:US11011511

    申请日:2004-12-14

    IPC分类号: G06F13/24

    CPC分类号: G06F13/24

    摘要: An interrupt processing technique is provided where an interrupt message is sent to an interrupt controller of a processor in response to an interrupt request from an individual device. The interrupt message comprises a memory address and interrupt status information. The memory address is specifically allocated to the device that has issued the interrupt request. The interrupt status information indicates an interrupt status of the device. An interrupt table that is stored in the memory is updated by the interrupt controller using the interrupt status information comprised in the interrupt message. The interrupt table holds device specific interrupt statuses. Updating the interrupt table comprises addressing the memory using the memory address in the interrupt message.

    摘要翻译: 提供一种中断处理技术,其中响应于来自单个设备的中断请求将中断消息发送到处理器的中断控制器。 中断消息包括存储器地址和中断状态信息。 存储器地址被专门分配给发出中断请求的设备。 中断状态信息表示设备的中断状态。 存储在存储器中的中断表由中断控制器使用中断消息中包含的中断状态信息进行更新。 中断表保存设备特定的中断状态。 更新中断表包括使用中断消息中的存储器地址寻址存储器。

    Method and apparatus for configuring a peripheral bus
    7.
    发明授权
    Method and apparatus for configuring a peripheral bus 有权
    用于配置外围总线的方法和装置

    公开(公告)号:US07162554B1

    公开(公告)日:2007-01-09

    申请号:US09904373

    申请日:2001-07-11

    IPC分类号: G06F13/00 G06F3/00

    CPC分类号: G06F13/385

    摘要: A method an apparatus for providing capability information to a shared controller. In one embodiment, a peripheral bus host controller may be shared by a plurality of peripheral devices coupled to a peripheral bus. The peripheral devices may include coder/decoder (codec) circuitry, and may be implemented using a riser card. The host controller may be configured to query the bus for peripheral devices by reading each address on the bus. During the querying process, the host controller may detect one or more peripheral devices coupled to the bus. Following the completion of the querying of the bus, the host controller may then begin reading configuration information from each of the detected devices. The host controller may employ one or more of several different techniques in order to read configuration information from the peripheral device. The configuration information at a minimum includes a device identifier, which may identify the vendor and the function of the device. Additional information needed to configure the device to communicate over the peripheral bus may also be obtained with a read of the device, or various lookup mechanisms, such as a lookup table or a tree-like data structure. After configuration information has been obtained for each device coupled to the bus, the host controller may dynamically configure each of the devices for communication over the bus, thereby allowing the flexibility to enumerate riser cards and add new functions through peripheral devices to the computer system in which the bus is implemented.

    摘要翻译: 一种用于向共享控制器提供能力信息的装置的方法。 在一个实施例中,外围总线主机控制器可以由耦合到外围总线的多个外围设备共享。 外围设备可以包括编码器/解码器(编解码器)电路,并且可以使用转接卡来实现。 主机控制器可以被配置为通过读取总线上的每个地址来查询外围设备的总线。 在查询过程期间,主机控制器可以检测耦合到总线的一个或多个外围设备。 在完成对总线的查询之后,主机控制器然后可以开始从每个检测到的设备读取配置信息。 主机控制器可以采用几种不同技术中的一种或多种,​​以便从外围设备读取配置信息。 配置信息至少包括设备标识符,其可以标识供应商和设备的功能。 通过设备的读取或诸如查找表或树状数据结构的各种查找机制也可以获得将设备配置成通过外围总线进行通信所需的附加信息。 在针对耦合到总线的每个设备获得配置信息之后,主机控制器可以动态地配置每个设备以通过总线进行通信,从而允许灵活地枚举转接卡并且通过外围设备将新功能添加到计算机系统 总线实施。

    Combined command and response on-chip data interface
    8.
    发明申请
    Combined command and response on-chip data interface 失效
    组合命令和响应片上数据接口

    公开(公告)号:US20060015667A1

    公开(公告)日:2006-01-19

    申请号:US10964884

    申请日:2004-10-14

    IPC分类号: G06F13/00

    CPC分类号: G06F13/4273

    摘要: An integrated circuit chip, particularly a southbridge, is provided that has a first and a second circuit unit. Each circuit unit can send requests to the other one and send back a response when receiving a request that requires a response. The first circuit unit is connected to the second circuit unit to send to the second circuit unit request data relating to a request to be sent by the first circuit unit and response data relating to a response to be sent by the first circuit unit over a shared signal line.

    摘要翻译: 提供具有第一和第二电路单元的集成电路芯片,特别是南桥。 每个电路单元可以向另一个电路单元发送请求,并在接收到需要响应的请求时发送响应。 第一电路单元连接到第二电路单元,以向第二电路单元发送与由第一电路单元发送的请求相关的数据,以及与第一电路单元通过共享的要发送的响应有关的响应数据 信号线。

    IGNITION SYSTEM AND OPERATING METHOD FOR SAME
    9.
    发明申请
    IGNITION SYSTEM AND OPERATING METHOD FOR SAME 审中-公开
    点火系统及其操作方法

    公开(公告)号:US20130298863A1

    公开(公告)日:2013-11-14

    申请号:US13885576

    申请日:2011-09-13

    IPC分类号: F02P23/04

    摘要: An ignition system is described, in particular for an internal combustion engine of a motor vehicle, having a laser spark plug, a pump module for supplying the laser spark plug with pump radiation, and an optical fiber device for transmitting the pump radiation from the pump module to the laser spark plug. At least two separate signal transmission devices which each extend at least partially along the optical fiber device, and an evaluation unit, which is designed to act on each of the signal transmission devices with a test signal, to evaluate a response signal of the signal transmission devices which results from the particular test signal, and from the response signal to deduce an operating state of the corresponding signal transmission device, are provided.

    摘要翻译: 具体涉及一种具有激光火花塞的激光火花塞,用于向激光火花塞提供泵浦辐射的泵模块以及用于从泵送出泵浦辐射的光纤装置的点火系统,特别是用于机动车辆的内燃机 模块到激光火花塞。 至少两个单独的信号传输设备,其每个至少部分地沿着光纤设备延伸,以及评估单元,其被设计为用测试信号作用在每个信号传输设备上,以评估信号传输的响应信号 提供由特定测试信号产生的设备和从响应信号推断对应的信号传输设备的操作状态。

    ATA and SATA compliant controller
    10.
    发明授权
    ATA and SATA compliant controller 有权
    ATA和SATA兼容控制器

    公开(公告)号:US07225290B2

    公开(公告)日:2007-05-29

    申请号:US10184434

    申请日:2002-06-27

    IPC分类号: G06F13/00

    摘要: An ATA (Advanced Technology Attachment) controller is provided that comprises at least one parallel port for connecting to at least one ATA compliant storage device, and at least one serial port for connecting to at least one SATA (Serial ATA) compliant storage device. Further, there is a port switching unit provided for switching to at least one of the parallel and serial ports to enable data transfer to and/or from a storage device connected to the port. This enables a software driven reconfiguration making it possible to switch between a mode where the controller behaves like a conventional ATA controller, and a mode where the controller behaves like a conventional SATA controller. A significant amount of hardware may be reused.

    摘要翻译: 提供了一种ATA(高级技术附件)控制器,其包括用于连接至少一个符合ATA的存储设备的至少一个并行端口以及用于连接至少一个SATA(串行ATA)兼容存储设备的至少一个串行端口。 此外,存在端口切换单元,用于切换到至少一个并行端口和串行端口,以使数据传输到和/或连接到端口的存储设备。 这使得能够进行软件驱动的重新配置,使得可以在控制器的行为像传统的ATA控制器的模式和控制器的行为像传统的SATA控制器的模式之间切换。 大量的硬件可能会重复使用。