(III) Plane gallium arsenide IMPATT diode
    4.
    发明授权
    (III) Plane gallium arsenide IMPATT diode 失效
    (III)砷化镓平面溅射二极管

    公开(公告)号:US4228453A

    公开(公告)日:1980-10-14

    申请号:US916820

    申请日:1978-06-16

    CPC分类号: H01L29/864

    摘要: In an avalanche diode of gallium arsenide, e.g. an IMPATT diode, the optimization of the coefficient of ionization by impact in the case of impacts initiated by holes when the electrical field propels the carriers along the axis of 1 1 1 of the monocrystal, has been utilized. The structure comprises a substrate of Ga As with two large faces perpendicular to the axis 1 1 1 and layers obtained by epitaxial growth from one of these large faces. Arrangements are made to ensure that the electrical field is as parallel as possible to this crystalline axis. The improvement in efficiency is of the order of 20%.

    摘要翻译: 在砷化镓的雪崩二极管中,例如, 已经使用了IMPATT二极管,当电场沿着单晶的111的轴推进载流子时,在由孔引发的冲击的情况下,通过冲击优化电离系数。 该结构包括具有垂直于轴线111的两个大面的GaAs衬底和通过从这些大面中的一个外延生长获得的层。 进行布置以确保电场尽可能平行于该晶轴。 效率的提高是20%左右。

    Impurity-based waveguide detectors
    5.
    发明授权
    Impurity-based waveguide detectors 失效
    基于杂质的波导检测器

    公开(公告)号:US07151881B2

    公开(公告)日:2006-12-19

    申请号:US10856127

    申请日:2004-05-28

    IPC分类号: G02B6/10

    摘要: An optical circuit including a semiconductor substrate; an optical waveguide formed in or on the substrate; and an optical detector formed in or on the semiconductor substrate, wherein the optical detector is aligned with the optical waveguide so as to receive an optical signal from the optical waveguide during operation, and wherein the optical detector has: a first electrode; a second electrode; and an intermediate layer between the first and second electrodes, the intermediate layer being made of a semiconductor material characterized by a conduction band, a valence band, and deep level energy states introduced between the conduction and valence bands.

    摘要翻译: 一种包括半导体衬底的光学电路; 形成在基板中或基板上的光波导; 以及形成在所述半导体衬底中或之上的光学检测器,其中所述光学检测器与所述光波导对准,以便在操作期间从所述光波导接收光信号,并且其中所述光学检测器具有:第一电极; 第二电极; 以及在所述第一和第二电极之间的中间层,所述中间层由导电带和导带之间引入的导带,价带和深能级状态的半导体材料制成。

    Triggerable superconductive switching means, and apparatus comprising
the means
    6.
    发明授权
    Triggerable superconductive switching means, and apparatus comprising the means 失效
    可触发的超导开关装置,以及包括该装置的装置

    公开(公告)号:US4754384A

    公开(公告)日:1988-06-28

    申请号:US74850

    申请日:1987-07-17

    IPC分类号: H02M11/00 H02M7/00 H03B15/00

    CPC分类号: H02M11/00

    摘要: Disclosed is a novel switching device. In its currently preferred embodiment the device comprises a conductive path that comprises a superconductive section, with the remainder of the path being non-superconductive, means for applying a voltage across the path such that a current flows, and means for changing the current in the path from a first value to a second value, where one of the two values is below, and the other is above, a critical current associated with the superconductive section of the path. Depending on the choice of applied voltage and path parameters changing the current from the first to the second state results in switching of the current, either oscillating between two levels of current, or to a steady value. Exemplarily, the current is changed by changing the applied voltage or by changing the resistance of the non-superconductive portion of the conductive path. The device can be used as, for instance, a microwave oscillator or a (binary) photodetector.

    摘要翻译: 公开了一种新颖的开关装置。 在其当前优选的实施例中,该器件包括导电路径,该导电路径包括超导部分,其中路径的其余部分是非超导的,用于跨过路径施加电压使得电流流动的装置,以及用于改变电流的装置 从第一值到第二值的路径,其中两个值中的一个在下面,另一个在上面,是与路径的超导部分相关联的临界电流。 根据施加的电压和路径参数的选择,将电流从第一状态改变到第二状态导致电流的切换,这两个电流在两个电平电平之间振荡,或者是稳定的值。 示例性地,通过改变施加的电压或通过改变导电路径的非超导部分的电阻来改变电流。 该装置可以用作例如微波振荡器或(二进制)光电检测器。

    Planar integrated circuit including a plasmon waveguide-fed Schottky barrier detector and transistors connected therewith
    7.
    发明授权
    Planar integrated circuit including a plasmon waveguide-fed Schottky barrier detector and transistors connected therewith 失效
    平面集成电路包括等离子体波导馈电肖特基势垒检测器和与其连接的晶体管

    公开(公告)号:US07170142B2

    公开(公告)日:2007-01-30

    申请号:US10854075

    申请日:2004-05-26

    IPC分类号: H01L31/00

    摘要: A planar integrated circuit includes a semiconductor substrate having a substrate surface and a trench in the substrate, a waveguide medium in the trench having a top surface and a light propagation axis, the trench having a sufficient depth for the waveguide medium to be at or below said substrate surface, and at least one Schottky barrier electrode formed on the top surface of said waveguide medium and defining a Schottky barrier detector consisting of the electrode and the portion of the waveguide medium underlying the Schottky barrier electrode, at least the underlying portion of the waveguide medium being a semiconductor and defining an electrode-semiconductor interface parallel to the light propagation axis so that light of a predetermined wavelength from said waveguide medium propagates along the interface as a plasmon-polariton wave.

    摘要翻译: 平面集成电路包括具有衬底表面和衬底中的沟槽的半导体衬底,沟槽中的波导介质具有顶表面和光传播轴,沟槽具有足够的深度以使波导介质处于或低于 所述衬底表面和形成在所述波导介质的顶表面上的至少一个肖特基势垒电极,并且限定由所述电极和所述肖特基势垒电极下方的所述波导介质的所述部分组成的肖特基势垒检测器, 波导介质是半导体并且限定平行于光传播轴线的电极 - 半导体界面,使得来自所述波导介质的预定波长的光作为等离子体 - 激元波沿着界面传播。