ELECTROSTATIC DISCHARGE PROJECTION SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    ELECTROSTATIC DISCHARGE PROJECTION SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    静电放电投影半导体器件及其制造方法

    公开(公告)号:US20100084711A1

    公开(公告)日:2010-04-08

    申请号:US12545271

    申请日:2009-08-21

    IPC分类号: H01L29/78 H01L21/336

    摘要: An electrical device, including a semiconductor device such an electrostatic discharge protection semiconductor device, and a method for manufacturing the same. An electrostatic discharge protection semiconductor device may include a substrate and a gate in and/or over the substrate. The gate may be multi-layered, and may include a gate oxide layer and a gate electrode. An electrostatic discharge protection semiconductor device may include a source region formed in and/or over a predetermined area of the substrate on a side of the gate, and a plurality of drain regions which may be sequentially multi-layered in and/or over the substrate on an opposing side of the gate in a vertical direction. At least one drain region may be overlapped with the gate in a horizontal direction.

    摘要翻译: 包括诸如静电放电保护半导体器件的半导体器件的电子器件及其制造方法。 静电放电保护半导体器件可以包括衬底和衬底中和/或之上的栅极。 栅极可以是多层的,并且可以包括栅极氧化物层和栅电极。 静电放电保护半导体器件可以包括形成在栅极侧上的衬底的预定区域中和/或之上的源极区域,以及可以在衬底中和/或衬底上顺序地多层的多个漏极区域 在垂直方向上在门的相对侧上。 至少一个漏极区域可以在水平方向上与栅极重叠。

    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
    2.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT 有权
    静电放电保护电路

    公开(公告)号:US20100044834A1

    公开(公告)日:2010-02-25

    申请号:US12536378

    申请日:2009-08-05

    IPC分类号: H01L27/06 H01L21/8222

    CPC分类号: H01L27/0259 H01L27/0823

    摘要: An electrostatic discharge (ESD) protection circuit includes a substrate, and a plurality of unit bipolar transistors formed in the substrate. Each of the plurality of unit bipolar transistors may include a first-conductivity-type buried layer formed in the substrate, a first-conductivity-type well formed over the first-conductivity-type buried layer, a second-conductivity-type well formed in the first-conductivity-type well, a first-conductivity-type vertical doping layer vertically formed from the surface of the substrate to the first-conductivity-type buried layer so as to surround the first-conductivity-type well, and a first-conductivity-type doping layer and a second conductivity-type doping layer formed in the second-conductivity-type well. The first-conductivity-type doping layer of any one of the adjacent unit bipolar transistors and the first-conductivity-type vertical doping layer of another one of the adjacent unit bipolar transistors may be connected to each other.

    摘要翻译: 静电放电(ESD)保护电路包括衬底和形成在衬底中的多个单位双极晶体管。 多个单位双极晶体管中的每一个可以包括形成在基板中的第一导电型掩埋层,在第一导电型掩埋层上形成的第一导电型掩埋层,形成在第二导电型掩埋层中的第二导电型阱 所述第一导电型阱,从所述基板的表面到所述第一导电型掩埋层,以包围所述第一导电型阱的方式垂直形成的第一导电型垂直掺杂层, 导电型掺杂层和形成在第二导电型阱中的第二导电型掺杂层。 相邻单位双极晶体管中的任一个的第一导电型掺杂层和另一个相邻单位双极晶体管的第一导电型垂直掺杂层可以彼此连接。

    Electrostatic discharge protection circuit
    3.
    发明授权
    Electrostatic discharge protection circuit 有权
    静电放电保护电路

    公开(公告)号:US08178948B2

    公开(公告)日:2012-05-15

    申请号:US12536378

    申请日:2009-08-05

    IPC分类号: H01L27/06 H01L21/8222

    CPC分类号: H01L27/0259 H01L27/0823

    摘要: An electrostatic discharge (ESD) protection circuit includes a substrate, and a plurality of unit bipolar transistors formed in the substrate. Each of the plurality of unit bipolar transistors may include a first-conductivity-type buried layer formed in the substrate, a first-conductivity-type well formed over the first-conductivity-type buried layer, a second-conductivity-type well formed in the first-conductivity-type well, a first-conductivity-type vertical doping layer vertically formed from the surface of the substrate to the first-conductivity-type buried layer so as to surround the first-conductivity-type well, and a first-conductivity-type doping layer and a second conductivity-type doping layer formed in the second-conductivity-type well. The first-conductivity-type doping layer of any one of the adjacent unit bipolar transistors and the first-conductivity-type vertical doping layer of another one of the adjacent unit bipolar transistors may be connected to each other.

    摘要翻译: 静电放电(ESD)保护电路包括衬底和形成在衬底中的多个单位双极晶体管。 多个单位双极晶体管中的每一个可以包括形成在基板中的第一导电型掩埋层,在第一导电型掩埋层上形成的第一导电型掩埋层,形成在第二导电型掩埋层中的第二导电型阱 所述第一导电型阱,从所述基板的表面到所述第一导电型掩埋层,以包围所述第一导电型阱的方式垂直形成的第一导电型垂直掺杂层, 导电型掺杂层和形成在第二导电型阱中的第二导电型掺杂层。 相邻单位双极晶体管中的任一个的第一导电型掺杂层和另一个相邻单位双极晶体管的第一导电型垂直掺杂层可以彼此连接。

    Wheeled footwear with spring suspension system
    4.
    发明申请
    Wheeled footwear with spring suspension system 审中-公开
    带弹簧悬挂系统的轮式鞋

    公开(公告)号:US20080313928A1

    公开(公告)日:2008-12-25

    申请号:US11517722

    申请日:2006-09-08

    摘要: An exemplary wheeled footwear with a spring suspension system is provided. In one embodiment, the footwear includes an upper, a midsole positioned in a midsole region, and an outsole. The spring suspension system is positioned in the midsole region of the footwear, and includes plurality of spring members, each having a first end and a second end, a top layer operable to support at least a portion of the plurality of spring members at the first end, and a bottom layer operable to support at least a portion of the plurality of spring members at the second end. The bottom layer may include an opening or openings formed in the bottom layer that may receive at least a portion of a wheel or wheels that may be positioned below the top layer and operable for rolling.

    摘要翻译: 提供了具有弹簧悬挂系统的示例性轮式鞋类。 在一个实施例中,鞋类包括定位在中底区域中的鞋面,中底和外底。 弹簧悬挂系统定位在鞋的中底区域中,并且包括多个弹簧构件,每个弹簧构件具有第一端和第二端,顶层可操作以在第一端支撑多个弹簧构件的至少一部分 并且底层可操作以在第二端处支撑多个弹簧构件的至少一部分。 底层可以包括形成在底层中的开口或开口,其可以容纳可以位于顶层下方并可操作用于滚动的轮或轮的至少一部分。

    ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND ELECTRONIC DEVICE HAVING THE SAME
    5.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND ELECTRONIC DEVICE HAVING THE SAME 有权
    静电放电保护装置和具有该静电放电保护装置的电子装置

    公开(公告)号:US20160163690A1

    公开(公告)日:2016-06-09

    申请号:US14809299

    申请日:2015-07-27

    CPC分类号: H01L27/0262 H01L27/027

    摘要: In an ESD protection device, a first well of a first conductivity type and a second well of a second conductivity type are formed in a substrate to contact each other. A first impurity region of the first conductivity type and a second impurity region of the second conductivity type are formed in the first well, and are electrically connected to a first electrode pad. The second impurity region is spaced apart from the first impurity region in a direction of the second well. A third impurity region is formed in the second well, has the second conductivity type, and is electrically connected to a second electrode pad. A fourth impurity region is formed in the second well, is located in a direction of the first well from the third impurity region to contact the third impurity region, has the first conductivity type, and is electrically floated.

    摘要翻译: 在ESD保护装置中,第一导电类型的第一阱和第二导电类型的第二阱形成在基板中以彼此接触。 第一导电类型的第一杂质区和第二导电类型的第二杂质区形成在第一阱中,并且电连接到第一电极焊盘。 第二杂质区域在第二阱的方向上与第一杂质区间隔开。 在第二阱中形成第三杂质区,具有第二导电类型,并且电连接到第二电极焊盘。 在第二阱中形成第四杂质区,位于第一阱的从第三杂质区方向接触第三杂质区,具有第一导电类型,并且是电漂浮的。