Electrostatic discharge protection circuit
    1.
    发明授权
    Electrostatic discharge protection circuit 有权
    静电放电保护电路

    公开(公告)号:US08178948B2

    公开(公告)日:2012-05-15

    申请号:US12536378

    申请日:2009-08-05

    IPC分类号: H01L27/06 H01L21/8222

    CPC分类号: H01L27/0259 H01L27/0823

    摘要: An electrostatic discharge (ESD) protection circuit includes a substrate, and a plurality of unit bipolar transistors formed in the substrate. Each of the plurality of unit bipolar transistors may include a first-conductivity-type buried layer formed in the substrate, a first-conductivity-type well formed over the first-conductivity-type buried layer, a second-conductivity-type well formed in the first-conductivity-type well, a first-conductivity-type vertical doping layer vertically formed from the surface of the substrate to the first-conductivity-type buried layer so as to surround the first-conductivity-type well, and a first-conductivity-type doping layer and a second conductivity-type doping layer formed in the second-conductivity-type well. The first-conductivity-type doping layer of any one of the adjacent unit bipolar transistors and the first-conductivity-type vertical doping layer of another one of the adjacent unit bipolar transistors may be connected to each other.

    摘要翻译: 静电放电(ESD)保护电路包括衬底和形成在衬底中的多个单位双极晶体管。 多个单位双极晶体管中的每一个可以包括形成在基板中的第一导电型掩埋层,在第一导电型掩埋层上形成的第一导电型掩埋层,形成在第二导电型掩埋层中的第二导电型阱 所述第一导电型阱,从所述基板的表面到所述第一导电型掩埋层,以包围所述第一导电型阱的方式垂直形成的第一导电型垂直掺杂层, 导电型掺杂层和形成在第二导电型阱中的第二导电型掺杂层。 相邻单位双极晶体管中的任一个的第一导电型掺杂层和另一个相邻单位双极晶体管的第一导电型垂直掺杂层可以彼此连接。

    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
    2.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT 有权
    静电放电保护电路

    公开(公告)号:US20100044834A1

    公开(公告)日:2010-02-25

    申请号:US12536378

    申请日:2009-08-05

    IPC分类号: H01L27/06 H01L21/8222

    CPC分类号: H01L27/0259 H01L27/0823

    摘要: An electrostatic discharge (ESD) protection circuit includes a substrate, and a plurality of unit bipolar transistors formed in the substrate. Each of the plurality of unit bipolar transistors may include a first-conductivity-type buried layer formed in the substrate, a first-conductivity-type well formed over the first-conductivity-type buried layer, a second-conductivity-type well formed in the first-conductivity-type well, a first-conductivity-type vertical doping layer vertically formed from the surface of the substrate to the first-conductivity-type buried layer so as to surround the first-conductivity-type well, and a first-conductivity-type doping layer and a second conductivity-type doping layer formed in the second-conductivity-type well. The first-conductivity-type doping layer of any one of the adjacent unit bipolar transistors and the first-conductivity-type vertical doping layer of another one of the adjacent unit bipolar transistors may be connected to each other.

    摘要翻译: 静电放电(ESD)保护电路包括衬底和形成在衬底中的多个单位双极晶体管。 多个单位双极晶体管中的每一个可以包括形成在基板中的第一导电型掩埋层,在第一导电型掩埋层上形成的第一导电型掩埋层,形成在第二导电型掩埋层中的第二导电型阱 所述第一导电型阱,从所述基板的表面到所述第一导电型掩埋层,以包围所述第一导电型阱的方式垂直形成的第一导电型垂直掺杂层, 导电型掺杂层和形成在第二导电型阱中的第二导电型掺杂层。 相邻单位双极晶体管中的任一个的第一导电型掺杂层和另一个相邻单位双极晶体管的第一导电型垂直掺杂层可以彼此连接。

    Semiconductor device and method of fabricating the same
    3.
    发明授权
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号:US09461148B2

    公开(公告)日:2016-10-04

    申请号:US13799291

    申请日:2013-03-13

    IPC分类号: H01L21/8234 H01L29/66

    CPC分类号: H01L29/66795

    摘要: A method of fabricating a semiconductor device is described. The method of fabricating a semiconductor device comprises providing a fin formed to protrude from a substrate and a plurality of gate electrodes formed on the fin to intersect the fin; forming first recesses in the fin on at least one side of the respective gate electrodes; forming an oxide layer on the surfaces of the first recesses; and expanding the first recesses into second recesses by removing the oxide layer. Related devices are also disclosed.

    摘要翻译: 描述制造半导体器件的方法。 制造半导体器件的方法包括提供形成为从基板突出的翅片和形成在鳍片上的与栅极相交的多个栅电极; 在所述翅片的至少一个侧面上形成第一凹部; 在所述第一凹部的表面上形成氧化物层; 并且通过去除氧化物层将第一凹槽膨胀成第二凹陷。 还公开了相关设备。

    Storage electrode of a capacitor and a method of forming the same
    5.
    发明授权
    Storage electrode of a capacitor and a method of forming the same 有权
    电容器的存储电极及其形成方法

    公开(公告)号:US07723182B2

    公开(公告)日:2010-05-25

    申请号:US11291798

    申请日:2005-11-30

    IPC分类号: H01L21/8242

    CPC分类号: H01L28/91 H01L27/10852

    摘要: In an embodiment, a storage electrode of a capacitor in a semiconductor device is resistant to inadvertent etching during its manufacturing processes. A method of forming the storage electrode of the capacitor is described. The storage electrode of the capacitor may include a first metal layer electrically connected with a source region of a transistor through a contact plug penetrating an insulating layer on a semiconductor substrate. A polysilicon layer may then be formed on the first metal layer. A second metal layer is formed on the polysilicon layer.

    摘要翻译: 在一个实施例中,半导体器件中的电容器的存储电极在其制造工艺期间耐受无意的蚀刻。 描述形成电容器的存储电极的方法。 电容器的存储电极可以包括通过穿过半导体衬底上的绝缘层的接触插塞与晶体管的源极区域电连接的第一金属层。 然后可以在第一金属层上形成多晶硅层。 在多晶硅层上形成第二金属层。

    Single sheet film filter, method of manufacturing the same, and plasma display apparatus using the same
    6.
    发明申请
    Single sheet film filter, method of manufacturing the same, and plasma display apparatus using the same 审中-公开
    单片滤光片及其制造方法以及使用其的等离子体显示装置

    公开(公告)号:US20090218950A1

    公开(公告)日:2009-09-03

    申请号:US12320886

    申请日:2009-02-06

    摘要: A single sheet film filter and a manufacturing method thereof and a plasma display apparatus with the single sheet film filter capable of preventing ground problems, securing ground resistance, and reducing ground processing time. This single sheet film filter includes a conductive layer for shielding EMI arranged on one surface of a transparent base film and having a ground portion at an edge region on the base film and a hard coating layer covering the conductive layer in which the ground portion is exposed through a plurality of apertures in a stripe shape formed in the hard coating layer.

    摘要翻译: 单片薄膜滤光器及其制造方法以及具有能够防止地面问题,确保接地电阻和降低地面处理时间的单片薄膜滤光器的等离子体显示装置。 该单片膜滤光器包括用于屏蔽布置在透明基膜的一个表面上的EMI的导电层,并且在基膜上的边缘区域具有接地部分,以及覆盖接地部分露出的导电层的硬涂层 通过形成在硬涂层中的条纹形状的多个孔。

    Method for controlling routing information for intellectual peripherals in subscriber-based ring-back-tone-service
    7.
    发明申请
    Method for controlling routing information for intellectual peripherals in subscriber-based ring-back-tone-service 有权
    用于基于用户的回铃音服务中智能外设路由信息的控制方法

    公开(公告)号:US20060135158A1

    公开(公告)日:2006-06-22

    申请号:US10525922

    申请日:2003-08-07

    IPC分类号: H04Q7/20

    摘要: A method for controlling routing information for intellectual peripherals (IPs) in a subscriber-based ring-back-tone service. The routing information to be routed to IPs (50) corresponding to subscribers is classified on a subscriber telephone number-by-number basis, a subscriber telephone office number-by-number basis, a subscriber telephone office number group-by-group basis or a subscriber's major activity area-by-area basis according to a selection. The classified routing information is set and registered in a home location register (HLR) (10). When the HLR (10) receives a location registration request message from a terminal of an arbitrary subscriber, a corresponding routing information item to be routed to an IP (50) corresponding to the subscriber's terminal among the classified, set and registered routing information is contained within a response message to the location registration request message, and the response message is provided to a terminating mobile switching center (T MSC) (32).

    摘要翻译: 一种在基于用户的回铃音服务中控制智能外设(IP)的路由信息​​的方法。 要路由到与用户相对应的IP(50)的路由信息​​按用户电话号码分组,逐个用户电话局,逐个用户电话号码,或者 根据选择,用户的主要活动逐区。 分类路由信息被设置并登记在归属位置寄存器(HLR)(10)中。 当HLR(10)从任意用户的终端接收到位置注册请求消息时,将包含要分配,设置和登记的路由信息​​中的对应于用户终端的IP(50)的对应路由选择信息项目 在到位置登记请求消息的响应消息内,向终端移动交换中心(T MSC)(32)提供响应消息。

    Method of managing trunk and querying and ascertaining ring-back sound to provide ring-back sound in subscriber-based ring-back sound service
    8.
    发明授权
    Method of managing trunk and querying and ascertaining ring-back sound to provide ring-back sound in subscriber-based ring-back sound service 失效
    在基于用户的回铃声服务中管理中继线和查询和确定回铃声以提供回铃声的方法

    公开(公告)号:US07010112B2

    公开(公告)日:2006-03-07

    申请号:US10525609

    申请日:2003-08-07

    IPC分类号: H04M3/42 H04M7/00

    摘要: The present invention relates to a method of managing a trunk, and querying and ascertaining a ring-back sound to provide the ring-back sound in a subscriber-based ring-back sound service. In the trunk management method, a terminating mobile switching center (32) requests the intelligent peripheral (50) to release a trunk call when the terminating mobile switching center recognizes the answer of the terminating subscriber or when a first predetermined period of time has elapsed from a time when it is recognized that a corresponding ring-back sound is provided to the originator. Further, the intelligent peripheral (50) requests the terminating mobile switching center (32) to release the trunk call when a second predetermined period of time has elapsed from a time when the ring-back sound is provided.

    摘要翻译: 本发明涉及一种管理中继线的方法,以及查询和确定回铃声以在基于用户的回铃声服务中提供回铃音。 在中继管理方法中,终端移动交换中心(32)在终端移动交换中心识别到终止用户的应答时或当第一预定时间段已经过去时请求智能外设(50)释放中继线呼叫 当认识到向发起者提供相应的回铃音时。 此外,当从提供回铃声的时间经过第二预定时间段时,智能外设(50)请求终接移动交换中心(32)释放中继线呼叫。

    One-cylinder stack capacitor and method for fabricating the same

    公开(公告)号:US06700153B2

    公开(公告)日:2004-03-02

    申请号:US10136385

    申请日:2002-05-02

    IPC分类号: H01L27108

    摘要: An etch stop layer is formed over a surface of an interlayer insulating layer and over a surface of a conductive plug extending at a depth from the surface of the interlayer insulating layer. A lower mold layer is deposited over the etch stop layer, and a wet etch rate of the lower mold layer is adjusted by adding dopants to the lower mold layer during formation of the lower mold layer, and by annealing the lower mold layer. An upper mold layer is then deposited over the surface of the lower mold layer, such that a wet etch rate of the upper mold layer is less than the adjusted wet etch rate of the lower mold layer. The upper mold layer, the lower mold layer and the etch stop layer are then subjected to dry etching to form an opening therein which exposes at least a portion of the surface of the contact plug. Then a wet etching of the upper mold layer and the lower mold layer is performed so as to increase a size of the opening at the lower mold layer and so at to expose a surface portion of the etch stop layer adjacent the surface of the conductive plug. A conductive material is then deposited over the surface of the opening in the upper and lower mold layers to define a capacitor electrode.