公开(公告)号：US08023602B2

公开(公告)日：2011-09-20

申请号：US11305791

申请日：2005-12-16

申请人： Jong-Sang Choi

发明人： Jong-Sang Choi

IPC分类号： H04L7/00

CPC分类号： H04L7/0008 ,  H04J3/0638

摘要： Serial data communication methods and apparatus using a single line are provided. The data communication methods may include: setting a rising edge of a serial pulse signal so that a cycle of the serial pulse signal begins therefrom; setting a falling edge of the serial pulse signal within the cycle of the serial pulse signal according to a data value recorded within the cycle of the serial pulse signal; and transmitting a packet formed by combining at least one cycle of the serial pulse signal in series via a single line.

摘要翻译： 提供使用单行的串行数据通信方法和装置。 数据通信方法可以包括：设置串行脉冲信号的上升沿，使得串行脉冲信号的周期从其开始; 根据记录在串行脉冲信号周期内的数据值，在串行脉冲信号周期内设置串行脉冲信号的下降沿; 以及通过经由单个线串联组合所述串行脉冲信号的至少一个周期而形成的分组。

公开(公告)号：US07564219B2

公开(公告)日：2009-07-21

申请号：US11715576

申请日：2007-03-08

申请人： Jong-Sang Choi ,  Jin-Kug Lee

发明人： Jong-Sang Choi ,  Jin-Kug Lee

IPC分类号： H01M10/46

CPC分类号： H02J7/0077

摘要： A charging controller includes a control node having a control voltage generated thereon for controlling a first current to a charged device and a second current to a reference device. Feedback loops are formed with amplifiers and a pull-up current source and control transistors, or with amplifiers and transfer transistors, for maintaining the second current at a constant current level during a constant current mode and for maintaining a voltage of the charged device at a constant voltage level during a constant voltage mode. Use of a pull-down current source at the control node is avoided for preventing damage to the charged device.

摘要翻译： 充电控制器包括控制节点，该控制节点具有在其上产生的控制电压，用于控制到充电装置的第一电流，以及将第二电流控制到参考装置。 反馈回路由放大器和上拉电流源和控制晶体管或放大器和转移晶体管形成，用于在恒定电流模式期间将第二电流保持在恒定电流水平，并且将带电器件的电压保持在 恒定电压模式下的恒定电压电平。 避免在控制节点使用下拉电流源，以防止对充电设备造成损坏。

公开(公告)号：US07520438B2

公开(公告)日：2009-04-21

申请号：US11212505

申请日：2005-08-26

申请人： Kyoung-Hun Kim ,  Seong-Hyun Kim ,  Jong-Hoon Shin ,  Yong-Joo Park ,  Zang-Hee Cho ,  Jong-Sang Choi ,  Jeon-Taek Im

发明人： Kyoung-Hun Kim ,  Seong-Hyun Kim ,  Jong-Hoon Shin ,  Yong-Joo Park ,  Zang-Hee Cho ,  Jong-Sang Choi ,  Jeon-Taek Im

IPC分类号： G06K19/06

CPC分类号： G06K19/07732 ,  G06K19/0723 ,  G06K19/07733

摘要： A multi-interface card includes smart card interface, memory card interface, card controller and memory module. The smart card interface interfaces with a smart card host using a smart card protocol. The memory card interface interfaces with a memory card host using a memory card protocol. The card controller controls the smart card host and memory card host so that the smart card host and the memory card host simultaneously interface with the smart card and the memory card interfaces, respectively. The memory module stores data transferred from the smart card host and memory card host. The multi-interface card simultaneously supports the smart card interface and the memory card interface. Thus, the one multi-interface card can support a subscriber authentication function and a data storage function.

摘要翻译： 多接口卡包括智能卡接口，存储卡接口，卡控制器和内存模块。 智能卡接口使用智能卡协议与智能卡主机进行接口。 存储卡接口与使用存储卡协议的存储卡主机接口。 卡控制器控制智能卡主机和存储卡主机，使得智能卡主机和存储卡主机分别与智能卡和存储卡接口同时接口。 内存模块存储从智能卡主机和存储卡主机传输的数据。 多接口卡同时支持智能卡接口和存储卡接口。 因此，一个多接口卡可以支持用户认证功能和数据存储功能。

公开(公告)号：US20120005488A1

公开(公告)日：2012-01-05

申请号：US13236897

申请日：2011-09-20

申请人： Joong-Chul YOON ,  Seong-Hyun KIM ,  Sung-Hyun KIM ,  Sang-Bum KIM ,  Sang-Wook KANG ,  Chul-Joon CHOI ,  Jong-Sang CHOI ,  Keon-Han SOHN ,  Byung-Yoon KANG

发明人： Joong-Chul YOON ,  Seong-Hyun KIM ,  Sung-Hyun KIM ,  Sang-Bum KIM ,  Sang-Wook KANG ,  Chul-Joon CHOI ,  Jong-Sang CHOI ,  Keon-Han SOHN ,  Byung-Yoon KANG

IPC分类号： G06F12/14

CPC分类号： H04L9/0625 ,  H04L9/0877 ,  H04L2209/34

摘要： An encryption processor, for storing encrypted data in a memory chip of a memory card, includes a FIFO memory for sequentially outputting m-bit data in response to a first signal, and an encryption key generator for generating m-bit encrypted keys (m being a positive integer) in response to a second signal and for sequentially outputting the keys in response to a third signal. A logic operator performs a logic operation on the data from the FIFO memory with the keys from the encryption key generator during a data write operation to sequentially encrypt the data. The logic operator performs a logic operation on the encrypted data received from a memory interface with the keys output from the encryption key generator during a data read operation in order to sequentially decode the encrypted data. The second signal is simultaneously generated with one of the write command or the read command.

摘要翻译： 一种加密处理器，用于将加密数据存储在存储卡的存储器芯片中，包括用于响应于第一信号顺序地输出m位数据的FIFO存储器和用于产生m位加密密钥的加密密钥产生器（m为 正整数），并响应于第三信号顺序输出键。 逻辑运算符在数据写入操作期间利用来自加密密钥生成器的密钥从FIFO存储器的数据执行逻辑运算，以顺序加密数据。 在数据读取操作期间，逻辑运算符对从加密密钥生成器输出的密钥从存储器接口接收的加密数据执行逻辑运算，以便对加密的数据进行顺序解码。 第二个信号与写入命令或读取命令之一同时生成。

公开(公告)号：US08054972B2

公开(公告)日：2011-11-08

申请号：US11853041

申请日：2007-09-11

申请人： Joong-Chul Yoon ,  Seong-Hyun Kim ,  Sung-hyun Kim ,  Sang-Bum Kim ,  Sang-Wook Kang ,  Chul-Joon Choi ,  Jong-Sang Choi ,  Koon-Han Sohn ,  Byung-Yoon Kang

发明人： Joong-Chul Yoon ,  Seong-Hyun Kim ,  Sung-hyun Kim ,  Sang-Bum Kim ,  Sang-Wook Kang ,  Chul-Joon Choi ,  Jong-Sang Choi ,  Koon-Han Sohn ,  Byung-Yoon Kang

IPC分类号： H04K1/00

CPC分类号： H04L9/0625 ,  H04L9/0877 ,  H04L2209/34

摘要： An encryption processor, for storing encrypted data in a memory chip of a memory card, includes a FIFO memory for sequentially outputting m-bit data in response to a first signal, and an encryption key generator for generating m-bit encrypted keys (m being a positive integer) in response to a second signal and for sequentially outputting the keys in response to a third signal. A logic operator performs a logic operation on the data from the FIFO memory with the keys from the encryption key generator during a data write operation to sequentially encrypt the data. The logic operator performs a logic operation on the encrypted data received from a memory interface with the keys output from the encryption key generator during a data read operation in order to sequentially decode the encrypted data. The second signal is simultaneously generated with one of the write command or the read command.

摘要翻译： 一种加密处理器，用于将加密数据存储在存储卡的存储器芯片中，包括用于响应于第一信号顺序地输出m位数据的FIFO存储器和用于产生m位加密密钥的加密密钥产生器（m为 正整数），并响应于第三信号顺序输出键。 逻辑运算符在数据写入操作期间利用来自加密密钥生成器的密钥从FIFO存储器的数据执行逻辑运算，以顺序加密数据。 在数据读取操作期间，逻辑运算符对从加密密钥生成器输出的密钥从存储器接口接收的加密数据执行逻辑运算，以便对加密的数据进行顺序解码。 第二个信号与写入命令或读取命令之一同时生成。

公开(公告)号：US20100281187A1

公开(公告)日：2010-11-04

申请号：US12837431

申请日：2010-07-15

申请人： Sang-Bum Kim ,  Sang-Wook Kang ,  Seong-Hyun Kim ,  Chul-Joon Choi ,  Jong-Sang Choi

发明人： Sang-Bum Kim ,  Sang-Wook Kang ,  Seong-Hyun Kim ,  Chul-Joon Choi ,  Jong-Sang Choi

IPC分类号： G06F3/00 ,  G06F13/42

CPC分类号： G06F13/385

摘要： An electronic device includes a universal serial bus (USB) interface therein. This USB interface is configured to support at least first and second different USB interface standards. These different interface standards are selected by the electronic device in response to comparing a voltage level of a signal provided to said USB interface relative to a reference voltage generated within the electronic device. The signal provided to the USB may be a power supply signal, the first USB standard may be a USB 2.0 interface standard and the second USB standard may be an inter-chip USB interface standard.

摘要翻译： 电子设备包括其中的通用串行总线（USB）接口。 该USB接口被配置为支持至少第一和第二不同的USB接口标准。 响应于比较提供给所述USB接口的信号的电压电平相对于在电子设备内产生的参考电压，电子设备选择这些不同的接口标准。 提供给USB的信号可以是电源信号，第一USB标准可以是USB 2.0接口标准，第二USB标准可以是芯片间的USB接口标准。

公开(公告)号：US07683584B2

公开(公告)日：2010-03-23

申请号：US11508920

申请日：2006-08-24

申请人： Jong-Sang Choi

发明人： Jong-Sang Choi

IPC分类号： H02J7/06 ,  H02J7/00 ,  H02J3/32 ,  H02J9/00

CPC分类号： H02J7/0068 ,  Y10T307/516 ,  Y10T307/527 ,  Y10T307/625 ,  Y10T307/696

摘要： A power source switching apparatus is provided. The example power source switching apparatus may include a voltage adjuster outputting a first power source voltage having a voltage level, corresponding to the output voltage of a battery, during an external power source mode where the battery is being charged, the first power source voltage based at least in part on the external power source and the output voltage of the battery, a controller outputting a first control signal and a second control signal, the first control signal enabled if the battery is operating in the external power source mode and the second control signal is enabled if the battery is not operating in the external power source mode, a first switch outputting the first power source voltage if the first control signal is enabled and a second switch outputting the output voltage of the battery if the second control signal is enabled.

摘要翻译： 提供电源切换装置。 示例电源切换装置可以包括电压调节器，其在电池正在充电的外部电源模式期间输出具有对应于电池的输出电压的电压电平的第一电源电压，基于第一电源电压 至少部分地基于所述外部电源和所述电池的输出电压，控制器输出第一控制信号和第二控制信号，所述第一控制信号在所述电池工作在所述外部电源模式时被使能，所述第二控制 如果电池未在外部电源模式下操作，则启用信号;如果第一控制信号被使能，则第一开关输出第一电源电压;以及第二开关，如果第二控制信号被使能则输出电池的输出电压 。

公开(公告)号：US20080276015A1

公开(公告)日：2008-11-06

申请号：US12175155

申请日：2008-07-17

申请人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

发明人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

IPC分类号： G06F3/00

CPC分类号： G06K7/0008 ,  G06K7/10297 ,  G06K19/07

摘要： The present invention provides an integrated circuit chip which includes a processor; a contact pad unit connected to a host through a plurality of contact pads; a host interface detector including at least one pull-up resistor and one pull-down resistor, for selectively connecting the pull-up resistor and the pull-down resistor to the contact pad unit to detect a host interface status; and an interface unit including a plurality of interface protocols, for communicating with the host using a part or all of the plurality of contact pads, wherein the processor receives a status of the host from the host interface detector, identifies a protocol of the host based on the received status of the host, and controls the interface unit so as to enable an interface protocol that is used to communicate with the host.

摘要翻译： 本发明提供一种集成电路芯片，其包括处理器; 接触垫单元，其通过多个接触垫连接到主机; 主机接口检测器，包括至少一个上拉电阻器和一个下拉电阻器，用于选择性地将上拉电阻器和下拉电阻器连接到接触焊盘单元以检测主机接口状态; 以及包括多个接口协议的接口单元，用于使用所述多个接触焊盘中的一部分或全部与所述主机进行通信，其中所述处理器从所述主机接口检测器接收所述主机的状态，识别所述主机的协议 关于主机的接收状态，并控制接口单元，以便启用用于与主机通信的接口协议。

公开(公告)号：US07332896B2

公开(公告)日：2008-02-19

申请号：US11315704

申请日：2005-12-22

申请人： Jong-Hoon Shin ,  Kyoung-Hun Kim ,  Seong-Hyun Kim ,  Yong-Joo Park ,  Jong-Sang Choi ,  Jeon-Taek Im ,  Zang-Hee Cho

发明人： Jong-Hoon Shin ,  Kyoung-Hun Kim ,  Seong-Hyun Kim ,  Yong-Joo Park ,  Jong-Sang Choi ,  Jeon-Taek Im ,  Zang-Hee Cho

IPC分类号： H02J1/00 ,  G05F5/00

CPC分类号： H02J7/0034 ,  H02J1/10 ,  Y10T307/675 ,  Y10T307/696 ,  Y10T307/729

摘要： An apparatus and method for controlling a supply voltage of a multiple interface card includes a first voltage adjustment unit, a second voltage adjustment unit, an internal circuit, a first voltage controller, and a second voltage controller. The first voltage controller adjusts a first supply voltage to a first internal supply voltage used as an operating voltage of the internal circuit and supplies the first internal supply voltage to the internal circuit. The second voltage adjustment unit adjusts a second supply voltage to a second internal supply voltage used as an operating voltage of the internal circuit and supplies the second internal supply voltage to the internal circuit. The first voltage controller detects the first supply voltage and, according to the first supply voltage, either applies the first supply voltage to the first voltage adjustment unit or blocks the first supply voltage from the first voltage adjustment unit. The second voltage controller detects the second supply voltage and, according to the detected voltage, either applies the second supply voltage to the second voltage adjustment unit or blocks the second supply voltage from the second voltage adjustment unit.

摘要翻译： 用于控制多接口卡的电源电压的装置和方法包括第一电压调节单元，第二电压调节单元，内部电路，第一电压控制器和第二电压控制器。 第一电压控制器将第一电源电压调整到用作内部电路的工作电压的第一内部电源电压，并将第一内部电源电压提供给内部电路。 第二电压调整单元将第二电源电压调整为用作内部电路的工作电压的第二内部电源电压，并将第二内部电源电压提供给内部电路。 第一电压控制器检测第一电源电压，并且根据第一电源电压将第一电源电压施加到第一电压调节单元，或者阻止来自第一电压调节单元的第一电源电压。 第二电压控制器检测第二电源电压，并且根据检测到的电压，将第二电源电压施加到第二电压调节单元，或者阻止来自第二电压调节单元的第二电源电压。

公开(公告)号：US20080013396A1

公开(公告)日：2008-01-17

申请号：US11798469

申请日：2007-05-14

申请人： Jong-Sang Choi ,  Seong-Hyun Kim ,  Sung-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Chul-Joon Choi

发明人： Jong-Sang Choi ,  Seong-Hyun Kim ,  Sung-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Chul-Joon Choi

IPC分类号： G11C5/14

CPC分类号： G06K19/077 ,  G06K19/07732

摘要： A method and apparatus for resetting a memory card having a plurality of interfaces and a plurality of function blocks, wherein each function block may be associated with a corresponding interface, may include detecting a reset signal for a selected interface of the plurality of interfaces, and interrupting a function block associated with the selected interface. When the selected interface is the only active interface, all function blocks in the memory card may be reset. If interfaces other than the selected interface are active, only the selected interface may be reset.

摘要翻译： 一种用于复位具有多个接口和多个功能块的存储卡的方法和装置，其中每个功能块可以与对应的接口相关联，可以包括检测所述多个接口中所选接口的复位信号，以及 中断与所选接口相关联的功能块。 当所选接口是唯一的活动接口时，存储卡中的所有功能块都可能被复位。 如果所选接口以外的接口处于活动状态，则只能选择接口。