公开(公告)号：US07921996B2

公开(公告)日：2011-04-12

申请号：US11644111

申请日：2006-12-22

申请人： Jong-weon Seo ,  Jong-hoon Kim ,  Chang-sik Kim ,  Sang-moon Lee ,  Jeong-bae Kim

发明人： Jong-weon Seo ,  Jong-hoon Kim ,  Chang-sik Kim ,  Sang-moon Lee ,  Jeong-bae Kim

IPC分类号： B65D85/00

CPC分类号： H05K5/0204

摘要： Provided is a case for a portable electronic device. The case includes an outer part; an inner part coupled to an inner surface of the outer part and including a plurality of holes; and fastening members, each including a main body having an outer diameter corresponding to an inner diameter of the hole in the inner part and a flange portion, wherein the flange portion is connected to an end portion of the main body, has an outer diameter greater than the outer diameter of the main body to be depressed into the inner part.

摘要翻译： 提供了一种用于便携式电子设备的情况。 案件包括外部部分; 内部部分，其耦合到所述外部部件的内表面并且包括多个孔; 以及紧固构件，每个紧固构件包括具有与内部的孔的内径相对应的外径的主体和凸缘部，其中所述凸缘部连接到所述主体的端部，所述外径更大 比主体的外径要被压入内部。

公开(公告)号：US20070164022A1

公开(公告)日：2007-07-19

申请号：US11644111

申请日：2006-12-22

申请人： Jong-weon Seo ,  Jong-hoon Kim ,  Chang-sik Kim ,  Sang-moon Lee ,  Jeong-bae Kim

发明人： Jong-weon Seo ,  Jong-hoon Kim ,  Chang-sik Kim ,  Sang-moon Lee ,  Jeong-bae Kim

IPC分类号： B65D6/00

CPC分类号： H05K5/0204

摘要： Provided is a case for a portable electronic device. The case includes an outer part; an inner part coupled to an inner surface of the outer part and including a plurality of holes; and fastening members, each including a main body having an outer diameter corresponding to an inner diameter of the hole in the inner part and a flange portion, wherein the flange portion is connected to an end portion of the main body, has an outer diameter greater than the outer diameter of the main body to be depressed into the inner part.

摘要翻译： 提供了一种用于便携式电子设备的情况。 案件包括外部部分; 内部部分，其耦合到所述外部部件的内表面并且包括多个孔; 以及紧固构件，每个紧固构件包括具有与内部的孔的内径相对应的外径的主体和凸缘部，其中所述凸缘部连接到所述主体的端部，所述外径更大 比主体的外径要被压入内部。

公开(公告)号：US20110110168A1

公开(公告)日：2011-05-12

申请号：US12833444

申请日：2010-07-09

申请人： Myung-hee Sung ,  Jong-hoon Kim

发明人： Myung-hee Sung ,  Jong-hoon Kim

IPC分类号： G11C5/14 ,  G11C7/00

CPC分类号： G11C7/02 ,  G11C5/04

摘要： A semiconductor memory device, a semiconductor memory module, and a semiconductor memory system including the same, the semiconductor memory device including a command/address input buffer that receives a command/address signal and a command/address reference voltage signal, wherein the command/address input buffer is configured to amplify a difference between the command/address signal and the command/address reference voltage signal, and is further configured to output the amplified difference between the command/address signal and the command/address reference voltage signal, and a chip selection input buffer that receives a chip selection signal and a chip selection reference voltage signal, wherein the chip selection input buffer is configured to amplify a difference between the chip selection signal and the chip selection reference voltage signal, and is further configured to output the amplified difference between the chip selection signal and the chip selection reference voltage signal, wherein a voltage level of the command/address reference voltage signal is different from a voltage level of the chip selection reference voltage signal.

摘要翻译： 半导体存储器件，半导体存储器模块和包括该半导体存储器模块的半导体存储器系统，该半导体存储器件包括接收命令/地址信号的命令/地址输入缓冲器和命令/地址参考电压信号，其中命令/ 地址输入缓冲器被配置为放大命令/地址信号和命令/地址参考电压信号之间的差，并且还被配置为输出指令/地址信号和命令/地址参考电压信号之间的放大差值，以及 接收芯片选择信号的芯片选择输入缓冲器和芯片选择基准电压信号，其中芯片选择输入缓冲器被配置为放大芯片选择信号和芯片选择参考电压信号之间的差异，并且还被配置为输出 芯片选择信号与芯片选择参考电压之间的放大差异 e信号，其中指令/地址参考电压信号的电压电平不同于芯片选择基准电压信号的电压电平。

公开(公告)号：US20130043191A1

公开(公告)日：2013-02-21

申请号：US13643395

申请日：2011-04-29

申请人： Han-oh Park ,  Jong-kab Kim ,  Yang-won Lee ,  Jong-hoon Kim

发明人： Han-oh Park ,  Jong-kab Kim ,  Yang-won Lee ,  Jong-hoon Kim

IPC分类号： B03C1/02

CPC分类号： C12M33/06 ,  C12N15/1003

摘要： Disclosed is an automatic purification apparatus for isolating target substances from multiple biological samples, and more particularly to an automatic biological sample purification apparatus equipped with a magnetic field applying part, in which the magnetic field applying part for purifying biological samples and a heating part are integrally formed with each other so as to be movable up and down.Further, disclosed is a method of extracting a target substance from the biological sample using the automatic biological sample purification apparatus equipped with the magnetic field applying part.

摘要翻译： 公开了一种用于从多个生物样品中分离目标物质的自动净化装置，更具体地，涉及一种具有磁场施加部的自动生物样品净化装置，其中用于纯化生物样品的磁场施加部和加热部一体化 彼此形成为可上下移动。 此外，公开了使用配备有磁场施加部的自动生物样品净化装置从生物样品中提取目标物质的方法。

公开(公告)号：US20070161264A1

公开(公告)日：2007-07-12

申请号：US11649266

申请日：2007-01-04

申请人： Jae-jun Lee ,  Jong-hoon Kim ,  Kwang-soo Park

发明人： Jae-jun Lee ,  Jong-hoon Kim ,  Kwang-soo Park

IPC分类号： H01R12/00

CPC分类号： G06F13/1694

摘要： A memory system is disclosed with first, second, and third connectors located on a system board, the third connector including pins connected to the pins of the first and second connectors through channels, and a memory controller connected to the pins of the third connector through channels. The memory system, as configured in a first memory capacity, comprises; dummy memory modules and a first memory module connected to the memory controller by installing the dummy memory modules in the first and second connectors and installing the first memory module in the third connector. The memory system, as alternately configured in a second memory capacity larger than the first memory capacity, comprises second memory modules connected to the memory controller by installing the second memory modules in only the first and second connectors.

摘要翻译： 公开了一种存储系统，其中位于系统板上的第一，第二和第三连接器，第三连接器包括通过通道连接到第一和第二连接器的引脚的引脚，以及连接到第三连接器的引脚的存储器控​​制器，通过 频道 如第一存储器容量中配置的存储器系统包括： 虚拟存储器模块和通过将虚拟存储器模块安装在第一和第二连接器中而连接到存储器控制器的第一存储器模块，并将第一存储器模块安装在第三连接器中。 交替地配置在大于第一存储器容量的第二存储器容量中的存储器系统包括通过仅将第二存储器模块安装在第一和第二连接器中而连接到存储器控制器的第二存储器模块。

公开(公告)号：US07304522B2

公开(公告)日：2007-12-04

申请号：US10372265

申请日：2003-02-25

申请人： Jong-hoon Kim ,  Pil-jung Jun ,  Jung-gun Byun ,  Dong-gun Kam ,  Joung-ho Kim

发明人： Jong-hoon Kim ,  Pil-jung Jun ,  Jung-gun Byun ,  Dong-gun Kam ,  Joung-ho Kim

IPC分类号： G06F1/04

CPC分类号： H03K5/135 ,  G06F1/08 ,  H03K2005/00065 ,  H04B15/02 ,  H04B2215/067

摘要： A spread spectrum clock generator includes a plurality of delay cells, wherein each delay cell includes at least one delayer receiving an external clock signal and causing a predetermined propagation delay to the received clock signal, and a controller transmitting a control signal to the delayer to control the propagation delay of the delayer according to a state value of the control signal. With this configuration, the spread spectrum clock generator using a delayer can have a simple circuit configuration and effectively attenuate an EMI.

摘要翻译： 扩展频谱时钟发生器包括多个延迟单元，其中每个延迟单元包括至少一个延迟器，其接收外部时钟信号并对所接收的时钟信号产生预定的传播延迟，以及控制器向延迟器发送控制信号以控制 延迟器根据控制信号的状态值的传播延迟。 利用这种配置，使用延迟器的扩频时钟发生器可以具有简单的电路配置并有效地衰减EMI。

公开(公告)号：US08493799B2

公开(公告)日：2013-07-23

申请号：US12833444

申请日：2010-07-09

申请人： Myung-hee Sung ,  Jong-hoon Kim

发明人： Myung-hee Sung ,  Jong-hoon Kim

IPC分类号： G11C7/02

CPC分类号： G11C7/02 ,  G11C5/04

摘要： A semiconductor memory device, a semiconductor memory module, and a semiconductor memory system including the same, the semiconductor memory device including a command/address input buffer that receives a command/address signal and a command/address reference voltage signal, wherein the command/address input buffer is configured to amplify a difference between the command/address signal and the command/address reference voltage signal, and is further configured to output the amplified difference between the command/address signal and the command/address reference voltage signal, and a chip selection input buffer that receives a chip selection signal and a chip selection reference voltage signal, wherein the chip selection input buffer is configured to amplify a difference between the chip selection signal and the chip selection reference voltage signal, and is further configured to output the amplified difference between the chip selection signal and the chip selection reference voltage signal, wherein a voltage level of the command/address reference voltage signal is different from a voltage level of the chip selection reference voltage signal.

摘要翻译： 半导体存储器件，半导体存储器模块和包括该半导体存储器模块的半导体存储器系统，该半导体存储器件包括接收命令/地址信号的命令/地址输入缓冲器和命令/地址参考电压信号，其中命令/ 地址输入缓冲器被配置为放大命令/地址信号和命令/地址参考电压信号之间的差，并且还被配置为输出指令/地址信号和命令/地址参考电压信号之间的放大差值，以及 接收芯片选择信号的芯片选择输入缓冲器和芯片选择基准电压信号，其中芯片选择输入缓冲器被配置为放大芯片选择信号和芯片选择参考电压信号之间的差异，并且还被配置为输出 芯片选择信号与芯片选择参考电压之间的放大差异 e信号，其中指令/地址参考电压信号的电压电平不同于芯片选择基准电压信号的电压电平。

公开(公告)号：US07539035B2

公开(公告)日：2009-05-26

申请号：US11649266

申请日：2007-01-04

申请人： Jae-jun Lee ,  Jong-hoon Kim ,  Kwang-soo Park

发明人： Jae-jun Lee ,  Jong-hoon Kim ,  Kwang-soo Park

IPC分类号： G11C11/00

CPC分类号： G06F13/1694

摘要： A memory system is disclosed with first, second, and third connectors located on a system board, the third connector including pins connected to the pins of the first and second connectors through channels, and a memory controller connected to the pins of the third connector through channels. The memory system, as configured in a first memory capacity, comprises; dummy memory modules and a first memory module connected to the memory controller by installing the dummy memory modules in the first and second connectors and installing the first memory module in the third connector. The memory system, as alternately configured in a second memory capacity larger than the first memory capacity, comprises second memory modules connected to the memory controller by installing the second memory modules in only the first and second connectors.

摘要翻译： 公开了一种存储系统，其中位于系统板上的第一，第二和第三连接器，第三连接器包括通过通道连接到第一和第二连接器的引脚的引脚，以及连接到第三连接器的引脚的存储器控​​制器，通过 频道 如第一存储器容量中配置的存储器系统包括： 虚拟存储器模块和通过将虚拟存储器模块安装在第一和第二连接器中而连接到存储器控制器的第一存储器模块，并将第一存储器模块安装在第三连接器中。 交替地配置在大于第一存储器容量的第二存储器容量中的存储器系统包括通过仅将第二存储器模块安装在第一和第二连接器中而连接到存储器控制器的第二存储器模块。

公开(公告)号：US07135572B2

公开(公告)日：2006-11-14

申请号：US11224787

申请日：2005-09-12

申请人： Il-hwan Cho ,  Jee-woong Lim ,  Ji-young Noh ,  Jong-hoon Kim ,  Sang-wook Park ,  Hyung-chul Ryu ,  Je-hak Kim ,  Jong-ho Kim ,  So-young Wang ,  Dal-hyun Kim ,  Chun-seon Lyu

发明人： Il-hwan Cho ,  Jee-woong Lim ,  Ji-young Noh ,  Jong-hoon Kim ,  Sang-wook Park ,  Hyung-chul Ryu ,  Je-hak Kim ,  Jong-ho Kim ,  So-young Wang ,  Dal-hyun Kim ,  Chun-seon Lyu

IPC分类号： C07D401/04

CPC分类号： C07D249/08 ,  C07D401/04

摘要： The present invention relates to a novel diaryl 1,2,4-triazole derivative of the following formula 1 as a highly selective cyclooxygenase-2 inhibitor: Wherein, R1, R2, R3, R4, R5, W and A is as defined in this specification.

摘要翻译： 本发明涉及作为高选择性环加氧酶-2抑制剂的新型的下式1的二芳基-1,2,4-三唑衍生物：其中R 1，R 2， R 3，R 4，R 5，W和A如本说明书中所定义。

公开(公告)号：US07990168B2

公开(公告)日：2011-08-02

申请号：US12708976

申请日：2010-02-19

申请人： Jong-hoon Kim ,  Hyun-ae Lee ,  Jin-ho So ,  Kwang-soo Park

发明人： Jong-hoon Kim ,  Hyun-ae Lee ,  Jin-ho So ,  Kwang-soo Park

IPC分类号： G01R31/00 ,  G01R1/067

CPC分类号： G01R1/07342

摘要： A probe card to connect a semiconductor device to test equipment includes a Printed Circuit Board (PCB) in which an electrical wiring pattern is formed, a first connector fixed on an upper surface of the PCB to connect the test equipment to the PCB, probe needles connected to electrode pads of the semiconductor device, and a Flexible PCB (FPCB) to connect the PCB to the probe needles. Accordingly, a signal transmission characteristic can be enhanced, test expenses can be reduced, and ground noise can be reduced.

摘要翻译： 用于将半导体器件连接到测试设备的探针卡包括其中形成电布线图案的印刷电路板（PCB），固定在PCB的上表面上以将测试设备连接到PCB的第一连接器，探针 连接到半导体器件的电极焊盘，以及柔性PCB（FPCB），以将PCB连接到探针。 因此，能够提高信号传递特性，能够降低测试费用，降低接地噪声。