USER DEVICE INCLUDING FLASH AND RANDOM WRITE CACHE AND METHOD WRITING DATA
    1.
    发明申请
    USER DEVICE INCLUDING FLASH AND RANDOM WRITE CACHE AND METHOD WRITING DATA 审中-公开
    用户设备包括闪存和随机写入速度和方法写数据

    公开(公告)号:US20100174853A1

    公开(公告)日:2010-07-08

    申请号:US12603687

    申请日:2009-10-22

    IPC分类号: G06F12/02

    摘要: A method of writing data to a flash memory in a system includes; receiving write data to be written in the flash memory, determining whether the received write data is random write data or sequential write data, if the received write data is sequential write data, then directly writing the received write data to the flash memory, and if the received write data is random write data, then writing the received write data to the random write cache, and flushing the random write data from the random write cache to the flash memory during idle periods for the flash memory.

    摘要翻译: 将数据写入系统中的闪存的方法包括: 接收要写入闪速存储器的写入数据,如果所接收的写入数据是顺序写入数据,则确定所接收的写入数据是随机写入数据还是顺序写入数据,然后将接收的写入数据直接写入闪速存储器,如果 接收到的写入数据是随机写入数据,然后将接收到的写入数据写入随机写入高速缓存,并且在闪速存储器的空闲周期期间将随机写入高速缓存中的随机写入数据刷新到闪速存储器。

    NONVOLATILE MEMORY DEVICE, SYSTEM, AND PROGRAMMING METHOD
    2.
    发明申请
    NONVOLATILE MEMORY DEVICE, SYSTEM, AND PROGRAMMING METHOD 有权
    非易失性存储器件,系统和编程方法

    公开(公告)号:US20100220526A1

    公开(公告)日:2010-09-02

    申请号:US12711450

    申请日:2010-02-24

    IPC分类号: G11C16/04 G11C7/00

    摘要: A nonvolatile memory device stores program data in a first address area, determines whether the first address area is a most significant address area and whether the program data is reliable data, and upon determining that the first address area is not a most significant address area and that the program data is reliable data, additionally stores the program data in a second address area.

    摘要翻译: 非易失性存储器件将程序数据存储在第一地址区域中,确定第一地址区域是否是最高有效地址区域,以及程序数据是否为可靠数据,并且在确定第一地址区域不是最高有效地址区域时, 程序数据是可靠数据,另外将程序数据存储在第二地址区域中。

    SEMICONDUCTOR MEMORY DEVICE AND SYSTEM
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND SYSTEM 有权
    半导体存储器件和系统

    公开(公告)号:US20100195418A1

    公开(公告)日:2010-08-05

    申请号:US12697543

    申请日:2010-02-01

    IPC分类号: G11C7/00 G11C29/00 G11C8/00

    摘要: Provided is a semiconductor memory device. The semiconductor memory device includes first and second memory chips and a control logic configured to execute an interleave program between the first and second memory chips. The control logic receives write data to be written into first and second memory blocks of the first memory chip. If the first and second memory blocks are normal blocks, the control logic simultaneously performs a program operation for the first and second memory blocks. If one memory block of the first and second memory blocks is a bad block, the control logic writes the received write data corresponding to the one memory block into a storage circuit.

    摘要翻译: 提供了一种半导体存储器件。 半导体存储器件包括第一和第二存储器芯片以及被配置为在第一和第二存储器芯片之间执行交织程序的控制逻辑。 控制逻辑接收要写入第一存储器芯片的第一和第二存储器块的写入数据。 如果第一和第二存储器块是正常块,则控制逻辑同时对第一和第二存储器块执行编程操作。 如果第一和第二存储器块的一个存储块是坏块,则控制逻辑将接收到的与一个存储器块相对应的写入数据写入存储电路。

    ELECTRONIC DEVICE COMPRISING FLASH MEMORY AND RELATED METHOD OF HANDLING PROGRAM FAILURES
    5.
    发明申请
    ELECTRONIC DEVICE COMPRISING FLASH MEMORY AND RELATED METHOD OF HANDLING PROGRAM FAILURES 审中-公开
    包含闪存的电子设备和处理程序故障的相关方法

    公开(公告)号:US20110271041A1

    公开(公告)日:2011-11-03

    申请号:US13074224

    申请日:2011-03-29

    IPC分类号: G06F12/02

    摘要: A storage device performs a program operation to store program data in a selected memory block of a flash memory. The storage device allocates a reserved area of the flash memory as a free block upon detecting that a program failure has occurred in the program operation, reads the program data from a cache latch in a page buffer of the flash memory, copies valid data stored in the selected memory block to a first area of the free block, and reprograms the program data read from the cache latch to a second area of the free block.

    摘要翻译: 存储装置执行程序操作以将程序数据存储在所选择的闪速存储器的存储块中。 存储设备在检测到程序操作中发生程序故障时,将闪存的保留区域分配为空闲块,从闪速存储器的页面缓冲器中的高速缓存锁存器中读取程序数据,将存储在 所选择的存储器块到自由块的第一区域,并且将从高速缓冲存储器锁存器读取的程序数据重新编程到自由块的第二区域。