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公开(公告)号：US20100177556A1
公开(公告)日：2010-07-15
申请号：US12351772
申请日：2009-01-09
CPC分类号： G11C11/412
摘要： An asymmetric static random access memory (SRAM) device that includes at least one SRAM cell is provided. The SRAM cell includes the first inverter and the second inverter. The first inverter is coupled between a first power and a ground power, and includes a first output terminal coupled to a first node and a first input terminal coupled to a second node. The second inverter is coupled between the first power and the ground power, and includes a second input terminal coupled to the first node and a second output terminal coupled to the second node. When the first inverter and the second inverter receive current from the first power, the SRAM cell is programmed to a predetermined value in advance according to different conductance levels of the first inverter and the second inverter.
摘要翻译： 提供了包括至少一个SRAM单元的非对称静态随机存取存储器（SRAM）器件。 SRAM单元包括第一反相器和第二反相器。 第一反相器耦合在第一功率和地功率之间，并且包括耦合到第一节点的第一输出端和耦合到第二节点的第一输入端。 第二反相器耦合在第一电源和地电之间，并且包括耦合到第一节点的第二输入端和耦合到第二节点的第二输出端。 当第一逆变器和第二逆变器从第一功率接收电流时，根据第一逆变器和第二逆变器的不同电导电平，预先将SRAM单元编程为预定值。
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公开(公告)号：US07916519B2
公开(公告)日：2011-03-29
申请号：US12368218
申请日：2009-02-09
IPC分类号： G11C11/00
CPC分类号： G11C29/02 , G11C11/41 , G11C29/025
摘要： A burn-in method for SRAMs and chips. For a memory cell of the SRAM, the SRAM burn-in method controls the control signals of the memory cell to generate current paths to pass through the memory cell, the corresponding bit-line and the corresponding bit-line-bar. The contacts/vias in the current paths are tested by providing burn-in currents to flow through the current paths, so that mismatched contacts/vias are burned by the burn-in currents. SRAMs that fail the burn-in test are abandoned after the burn-in procedure.
摘要翻译： 一种SRAM和芯片的老化方法。 对于SRAM的存储单元，SRAM老化方法控制存储器单元的控制信号，以产生通过存储单元，对应位线和相应位线条的电流路径。 通过提供老化电流流过电流路径来测试电流路径中的触点/通孔，从而使不匹配的触点/通孔被老化电流烧毁。 老化测试失败的SRAM在老化过程之后被放弃。
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公开(公告)号：US20100202219A1
公开(公告)日：2010-08-12
申请号：US12368218
申请日：2009-02-09
CPC分类号： G11C29/02 , G11C11/41 , G11C29/025
摘要： A burn-in method for SRAMs and chips. For a memory cell of the SRAM, the SRAM burn-in method controls the control signals of the memory cell to generate current paths to pass through the memory cell, the corresponding bit-line and the corresponding bit-line-bar. The contacts/vias in the current paths are tested by providing burn-in currents to flow through the current paths, so that mismatched contacts/vias are burned by the burn-in currents. SRAMs that fail the burn-in test are abandoned after the burn-in procedure.
摘要翻译： 一种SRAM和芯片的老化方法。 对于SRAM的存储单元，SRAM老化方法控制存储器单元的控制信号，以产生通过存储单元，对应位线和相应位线条的电流路径。 通过提供老化电流流过电流路径来测试电流路径中的触点/通孔，从而使不匹配的触点/通孔被老化电流烧毁。 老化测试失败的SRAM在老化过程之后被放弃。
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公开(公告)号：US07706203B2
公开(公告)日：2010-04-27
申请号：US12191116
申请日：2008-08-13
IPC分类号： G11C5/14
CPC分类号： G11C11/417 , G11C5/147 , G11C8/08
摘要： A memory system is provided, comprising at least one memory unit and a source power supply circuit. Each memory unit is coupled between a source voltage and a ground voltage and accesses digital data according to a word line signal and a bit line signal. The source power supply circuit provides the source voltage to the memory units. When the memory unit is in a writing status, the source voltage is the first power voltage. When the memory unit is in a reading status, the source voltage is the second power voltage. The second power voltage equals to the first power voltage subtracted by a specific voltage for avoiding rewriting error.
摘要翻译： 提供一种存储器系统，包括至少一个存储器单元和源极电源电路。 每个存储器单元耦合在源电压和接地电压之间，并根据字线信号和位线信号访问数字数据。 源电源电路将源电压提供给存储器单元。 当存储器单元处于写入状态时，源电压是第一个电源电压。 当存储器单元处于读取状态时，源电压是第二个电源电压。 第二电源电压等于由特定电压减去的第一个电源电压，以避免重写错误。
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公开(公告)号：US20090238023A1
公开(公告)日：2009-09-24
申请号：US12191116
申请日：2008-08-13
CPC分类号： G11C11/417 , G11C5/147 , G11C8/08
摘要： A memory system is provided, comprising at least one memory unit and a source power supply circuit. Each memory unit is coupled between a source voltage and a ground voltage and accesses digital data according to a word line signal and a bit line signal. The source power supply circuit provides the source voltage to the memory units. When the memory unit is in a writing status, the source voltage is the first power voltage. When the memory unit is in a reading status, the source voltage is the second power voltage. The second power voltage equals to the first power voltage subtracted by a specific voltage for avoiding rewriting error.
摘要翻译： 提供一种存储器系统，包括至少一个存储器单元和源极电源电路。 每个存储器单元耦合在源电压和接地电压之间，并根据字线信号和位线信号访问数字数据。 源电源电路将源电压提供给存储器单元。 当存储器单元处于写入状态时，源电压是第一个电源电压。 当存储器单元处于读取状态时，源电压是第二个电源电压。 第二电源电压等于由特定电压减去的第一个电源电压，以避免重写错误。
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公开(公告)号：US07755925B2
公开(公告)日：2010-07-13
申请号：US11636524
申请日：2006-12-11
申请人： Jui-Lung Chen , Gia-Hua Hsieh , Yi-Hsun Chung , Chia-Chiuan Chang , Yu-Chih Yeh , Ho-Hsiang Chen
发明人： Jui-Lung Chen , Gia-Hua Hsieh , Yi-Hsun Chung , Chia-Chiuan Chang , Yu-Chih Yeh , Ho-Hsiang Chen
IPC分类号： G11C11/00
CPC分类号： G11C11/412 , G11C11/413
摘要： A static random access memory comprising a column driver, a row driver, a cell, and a control unit is disclosed. The column driver selects a first word line or a second word line. The row provides data to a first bit line and a second bit line. The data of the first bit line is opposite to that of the second bit line. The control unit controls the voltage of the cell. In normal mode, the voltage of the cell is equal to a second voltage. In stand-by mode, the voltage of the cell exceeds the second voltage.
摘要翻译： 公开了一种包括列驱动器，行驱动器，单元和控制单元的静态随机存取存储器。 列驱动器选择第一字线或第二字线。 该行将数据提供给第一位线和第二位线。 第一位线的数据与第二位线的数据相反。 控制单元控制电池的电压。 在正常模式下，电池的电压等于第二电压。 在待机模式下，电池的电压超过第二电压。
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公开(公告)号：US20080137398A1
公开(公告)日：2008-06-12
申请号：US11636524
申请日：2006-12-11
申请人： Jui-Lung Chen , Gia-Hua Hsieh , Yi-Hsun Chung , Chia-Chiuan Chang , Yu-Chih Yeh , Ho-Hsiang Chen
发明人： Jui-Lung Chen , Gia-Hua Hsieh , Yi-Hsun Chung , Chia-Chiuan Chang , Yu-Chih Yeh , Ho-Hsiang Chen
IPC分类号： G11C11/00
CPC分类号： G11C11/412 , G11C11/413
摘要： A static random access memory comprising a column driver, a row driver, a cell, and a control unit is disclosed. The column driver selects a first word line or a second word line. The row provides data to a first bit line and a second bit line. The data of the first bit line is opposite to that of the second bit line. The control unit controls the voltage of the cell. In normal mode, the voltage of the cell is equal to a second voltage. In stand-by mode, the voltage of the cell exceeds the second voltage.
摘要翻译： 公开了一种包括列驱动器，行驱动器，单元和控制单元的静态随机存取存储器。 列驱动器选择第一字线或第二字线。 该行将数据提供给第一位线和第二位线。 第一位线的数据与第二位线的数据相反。 控制单元控制电池的电压。 在正常模式下，电池的电压等于第二电压。 在待机模式下，电池的电压超过第二电压。
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