公开(公告)号：US20100329020A1

公开(公告)日：2010-12-30

申请号：US12796209

申请日：2010-06-08

申请人： Jung Chul HAN ,  Seong Je Park

发明人： Jung Chul HAN ,  Seong Je Park

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C2216/14

摘要： A method of programming a nonvolatile memory device includes an initial data setting step of inputting data for program inhibition to a first latch of a page buffer to which memory cells to be programmed with a second threshold voltage distribution are coupled, a first program and verification step of performing program and verification operations, a first data setting step of, when a program pulse is supplied more than N times (where N is a natural number), inputting data for performing a program operation to the first latch of the page buffer to which the memory cells to be programmed with the second threshold voltage distribution are coupled, and a second program and verification step of performing program and verification operations.

摘要翻译： 一种对非易失性存储器件进行编程的方法包括：初始数据设置步骤，用于将用于编程禁止的数据输入到第二阈值电压分布所要编程的存储器单元的页缓冲器的第一锁存器，第一程序和验证步骤 执行程序和验证操作的第一数据设置步骤，当程序脉冲被提供多于N次（其中N是自然数）时，将用于执行编程操作的数据输入到页缓冲器的第一锁存器 将要用第二阈值电压分布编程的存储器单元耦合，以及执行程序和验证操作的第二程序和验证步骤。

公开(公告)号：US20090290418A1

公开(公告)日：2009-11-26

申请号：US12469346

申请日：2009-05-20

申请人： Jung Chul HAN

发明人： Jung Chul HAN

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/10 ,  G11C16/3454 ,  G11C16/3459 ,  G11C2211/5621 ,  G11C2216/14

摘要： A method of verifying a program operation in a non-volatile memory device includes performing a program operation, verifying whether or not each of a plurality of program target memory cells is programmed to a voltage higher than a verifying voltage, counting a number of fail status bits in response to determining that a fail status memory cell is not programmed with a voltage higher than the verifying voltage based on the verified result, and setting data so that a plurality of page buffers each output a pass signal when the number of the fail status bits is smaller than a number of error correction code (ECC) processing bits.

摘要翻译： 一种验证非易失性存储器件中的程序操作的方法包括执行程序操作，验证多个程序目标存储器单元中的每一个是否被编程为高于验证电压的电压，对故障状态数进行计数 响应于基于验证结果确定故障状态存储单元未被编程为具有高于验证电压的电压的位，并且设置数据使得当故障状态的数量时多个页缓冲器输出通过信号 比特小于多个纠错码（ECC）处理比特。

公开(公告)号：US20120195117A1

公开(公告)日：2012-08-02

申请号：US13219628

申请日：2011-08-27

申请人： Jung Chul HAN

发明人： Jung Chul HAN

IPC分类号： G11C16/10 ,  G11C16/06

CPC分类号： G11C16/10 ,  G11C11/5642 ,  G11C16/06 ,  G11C16/3404

摘要： A data programming method includes the steps of determining whether a threshold voltage distribution of a memory cell, where a first bit value of writing data was programmed, has deviated from a targeted first voltage range, correcting the first bit value through an error correction code if the threshold voltage distribution of the memory cell has deviated from the first voltage range, and programming a corrected first bit value and a second bit value of the writing data to the memory cell.

摘要翻译： 数据编程方法包括以下步骤：确定写入数据的第一位值是否被编程的存储单元的阈值电压分布是否偏离目标第一电压范围，通过纠错码校正第一位值，如果 存储单元的阈值电压分布已偏离第一电压范围，并且将修正的第一位值和写入数据的第二位值编程到存储单元。

公开(公告)号：US20120198132A1

公开(公告)日：2012-08-02

申请号：US13188685

申请日：2011-07-22

申请人： Jung Chul HAN

发明人： Jung Chul HAN

IPC分类号： G06F12/00

CPC分类号： G11C11/5628 ,  G11C16/10 ,  G11C16/32

摘要： A non-volatile memory system includes a memory area including one or more non-volatile memory apparatuses, and a controller includes a buffer for storing program data, and is configured to transmit a program command and the program data to the memory area and delete the program data stored in the buffer as a program operation is started in the memory area.

摘要翻译： 非易失性存储器系统包括包括一个或多个非易失性存储装置的存储器区域，并且控制器包括用于存储程序数据的缓冲器，并且被配置为将程序命令和程序数据发送到存储区域并删除 作为程序操作存储在缓冲器中的程序数据在存储器区域中开始。

公开(公告)号：US20100226171A1

公开(公告)日：2010-09-09

申请号：US12650613

申请日：2009-12-31

申请人： Jung Chul HAN

发明人： Jung Chul HAN

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C16/3418 ,  G11C11/5628

摘要： A method of programming a nonvolatile memory device includes receiving a program command, performing program and verification operations in response to each of a number of program pulse, and performing an n number of program operations, where n is a positive integer and at least one verification operation for the n program operations has been omitted.

摘要翻译： 一种编程非易失性存储器件的方法包括接收程序命令，响应于多个编程脉冲中的每一个执行程序和验证操作，以及执行n个程序操作，其中n是正整数和至少一个验证 已经省略了对n程序操作的操作。

公开(公告)号：US20100182844A1

公开(公告)日：2010-07-22

申请号：US12472678

申请日：2009-05-27

申请人： Jung Chul HAN

发明人： Jung Chul HAN

IPC分类号： G11C16/06

CPC分类号： G11C16/3454

摘要： In an operating method in a read or verification operation of a nonvolatile memory device, selected bit lines are precharged to a logic high level and, at the same time, unselected bit lines are discharged to a logic low level. The selected and unselected bit lines are connected to respective memory cell strings and, concurrently, word lines are supplied with a pass voltage. The connection between the selected and unselected bit lines and the respective memory cell strings is shut off and, concurrently, a selected word line is supplied with a ground voltage. The selected and unselected bit lines and the respective memory cell strings are coupled together and, concurrently, a selected word line is supplied with a reference voltage and an unselected word line is supplied with the pass voltage.

摘要翻译： 在非易失性存储器件的读取或验证操作中的操作方法中，所选择的位线被预充电到逻辑高电平，并且同时未选择的位线被放电到逻辑低电平。 所选择的和未选择的位线被连接到相应的存储单元串，同时，字线被提供有通过电压。 所选择的和未选择的位线与各个存储单元串之间的连接被切断，同时，所选择的字线被提供有接地电压。 所选择的和未选择的位线和相应的存储器单元串耦合在一起，并且同时将选定的字线提供给参考电压，并且向未选择的字线提供通过电压。