公开(公告)号：US08001356B2

公开(公告)日：2011-08-16

申请号：US11565811

申请日：2006-12-01

申请人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

发明人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7211

摘要： Integrated circuit systems include a non-volatile memory device (e.g, flash EEPROM device) and a memory processing circuit. The memory processing circuit is electrically coupled to the non-volatile memory device. The memory processing circuit is configured to reallocate addressable space within the non-volatile memory device. This reallocation is performed by increasing a number of physical addresses within the non-volatile memory device that are reserved as redundant memory addresses, in response to a capacity adjust command received by the memory processing circuit.

摘要翻译： 集成电路系统包括非易失性存储器件（例如，快闪EEPROM器件）和存储器处理电路。 存储器处理电路电耦合到非易失性存储器件。 存储器处理电路被配置为重新分配非易失性存储器件内的可寻址空间。 响应于由存储器处理电路接收的容量调整命令，通过增加非易失性存储器件中被保留为冗余存储器地址的物理地址的数量来执行该重新分配。

公开(公告)号：US20130311709A1

公开(公告)日：2013-11-21

申请号：US13656446

申请日：2012-10-19

申请人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

发明人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7211

摘要： Integrated circuit systems include a non-volatile memory device (e.g, flash EEPROM device) and a memory processing circuit. The memory processing circuit is electrically coupled to the non-volatile memory device. The memory processing circuit is configured to reallocate addressable space within the non-volatile memory device. This reallocation is performed by increasing a number of physical addresses within the non-volatile memory device that are reserved as redundant memory addresses, in response to a capacity adjust command received by the memory processing circuit.

摘要翻译： 集成电路系统包括非易失性存储器件（例如，快闪EEPROM器件）和存储器处理电路。 存储器处理电路电耦合到非易失性存储器件。 存储器处理电路被配置为重新分配非易失性存储器件内的可寻址空间。 响应于由存储器处理电路接收的容量调整命令，通过增加非易失性存储器件中被保留为冗余存储器地址的物理地址的数量来执行该重新分配。

公开(公告)号：US20080098193A1

公开(公告)日：2008-04-24

申请号：US11565811

申请日：2006-12-01

申请人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

发明人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7211

摘要： Integrated circuit systems include a non-volatile memory device (e.g, flash EEPROM device) and a memory processing circuit. The memory processing circuit is electrically coupled to the non-volatile memory device. The memory processing circuit is configured to reallocate addressable space within the non-volatile memory device. This reallocation is performed by increasing a number of physical addresses within the non-volatile memory device that are reserved as redundant memory addresses, in response to a capacity adjust command received by the memory processing circuit.

摘要翻译： 集成电路系统包括非易失性存储器件（例如，快闪EEPROM器件）和存储器处理电路。 存储器处理电路电耦合到非易失性存储器件。 存储器处理电路被配置为重新分配非易失性存储器件内的可寻址空间。 响应于由存储器处理电路接收的容量调整命令，通过增加非易失性存储器件中被保留为冗余存储器地址的物理地址的数量来执行该重新分配。

公开(公告)号：US08312248B2

公开(公告)日：2012-11-13

申请号：US13208804

申请日：2011-08-12

申请人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

发明人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7211

摘要： Integrated circuit systems include a non-volatile memory device (e.g, flash EEPROM device) and a memory processing circuit. The memory processing circuit is electrically coupled to the non-volatile memory device. The memory processing circuit is configured to reallocate addressable space within the non-volatile memory device. This reallocation is performed by increasing a number of physical addresses within the non-volatile memory device that are reserved as redundant memory addresses, in response to a capacity adjust command received by the memory processing circuit.

摘要翻译： 集成电路系统包括非易失性存储器件（例如，快闪EEPROM器件）和存储器处理电路。 存储器处理电路电耦合到非易失性存储器件。 存储器处理电路被配置为重新分配非易失性存储器件内的可寻址空间。 响应于由存储器处理电路接收的容量调整命令，通过增加非易失性存储器件中被保留为冗余存储器地址的物理地址的数量来执行该重新分配。

公开(公告)号：US20110302360A1

公开(公告)日：2011-12-08

申请号：US13208804

申请日：2011-08-12

申请人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

发明人： Jung-Been Im ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Shea-Yun Lee

IPC分类号： G06F12/02 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7211

摘要： Integrated circuit systems include a non-volatile memory device (e.g, flash EEPROM device) and a memory processing circuit. The memory processing circuit is electrically coupled to the non-volatile memory device. The memory processing circuit is configured to reallocate addressable space within the non-volatile memory device. This reallocation is performed by increasing a number of physical addresses within the non-volatile memory device that are reserved as redundant memory addresses, in response to a capacity adjust command received by the memory processing circuit.

摘要翻译： 集成电路系统包括非易失性存储器件（例如，快闪EEPROM器件）和存储器处理电路。 存储器处理电路电耦合到非易失性存储器件。 存储器处理电路被配置为重新分配非易失性存储器件内的可寻址空间。 响应于由存储器处理电路接收的容量调整命令，通过增加非易失性存储器件中被保留为冗余存储器地址的物理地址的数量来执行该重新分配。

公开(公告)号：US08745312B2

公开(公告)日：2014-06-03

申请号：US12071498

申请日：2008-02-21

申请人： Eun-Jin Yun ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Jin-Hyuk Kim

发明人： Eun-Jin Yun ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Jin-Hyuk Kim

IPC分类号： G06F12/06

CPC分类号： G06F12/0246 ,  G06F2212/7201

摘要： A non-volatile memory may include a plurality of map blocks for storing a plurality of map units, the map units representing mapping information between physical addresses and logical addresses. A storage device may include such a non-volatile memory. A method of mapping such a non-volatile memory may include writing historical information regarding locations of valid map units among the map units included in map blocks previously allocated among the map blocks when a new map block among the map blocks is allocated, the valid map units representing valid mapping information, and constructing a map table including all of the valid mapping information based on the historical information and a result of searching a map block recently allocated among the map blocks.

摘要翻译： 非易失性存储器可以包括用于存储多个地图单元的多个地图块，地图单元表示物理地址和逻辑地址之间的映射信息。 存储设备可以包括这样的非易失性存储器。 映射这种非易失性存储器的方法可以包括：当分配地图块中的新映射块之前，在地图块之前分配的映射块中包括的映射单元中的有效映射单元的位置的写入历史信息，有效映射 表示有效映射信息的单元，以及基于历史信息构建包括所有有效映射信息的映射表，以及搜索最近在映射块中分配的映射块的结果。

公开(公告)号：US20080209161A1

公开(公告)日：2008-08-28

申请号：US12071498

申请日：2008-02-21

申请人： Eun-Jin Yun ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Jin-Hyuk Kim

发明人： Eun-Jin Yun ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Jin-Hyuk Kim

IPC分类号： G06F12/06

CPC分类号： G06F12/0246 ,  G06F2212/7201

摘要： A non-volatile memory may include a plurality of map blocks for storing a plurality of map units, the map units representing mapping information between physical addresses and logical addresses. A storage device may include such a non-volatile memory. A method of mapping such a non-volatile memory may include writing historical information regarding locations of valid map units among the map units included in map blocks previously allocated among the map blocks when a new map block among the map blocks is allocated, the valid map units representing valid mapping information, and constructing a map table including all of the valid mapping information based on the historical information and a result of searching a map block recently allocated among the map blocks.

摘要翻译： 非易失性存储器可以包括用于存储多个地图单元的多个地图块，地图单元表示物理地址和逻辑地址之间的映射信息。 存储设备可以包括这样的非易失性存储器。 映射这种非易失性存储器的方法可以包括：当分配地图块中的新映射块时，在地图块之前分配的映射块中包括的映射单元中的有效映射单元的位置的写入历史信息，有效映射 表示有效映射信息的单元，以及基于历史信息构建包括所有有效映射信息的映射表，以及搜索最近在映射块中分配的映射块的结果。

公开(公告)号：US20080109588A1

公开(公告)日：2008-05-08

申请号：US11565184

申请日：2006-11-30

申请人： Eun-Jin Yun ,  Jin-Hyuk Kim ,  Dong-Gi Lee ,  Shea-Yun Lee

发明人： Eun-Jin Yun ,  Jin-Hyuk Kim ,  Dong-Gi Lee ,  Shea-Yun Lee

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  Y02D10/13

摘要： A memory card capable of having an increased number of meta blocks and a method of driving the memory card. A method of reading data from the memory card includes receiving logical addresses from a host. It is determined whether memory blocks corresponding to the received logical addresses belong to a first region allocated to a user data region in the memory card or a second region including meta blocks in the memory card. The memory blocks corresponding to the logical addresses are masked as erased blocks when the memory blocks belong to the second region.

摘要翻译： 一种能够增加元数据块的存储卡和驱动存储卡的方法。 从存储卡读取数据的方法包括从主机接收逻辑地址。 确定与接收到的逻辑地址相对应的存储器块是否属于分配给存储卡中的用户数据区域的第一区域或包括存储卡中的元块的第二区域。 当存储器块属于第二区域时，对应于逻辑地址的存储器块被屏蔽为擦除块。

公开(公告)号：US20120329057A1

公开(公告)日：2012-12-27

申请号：US13519769

申请日：2010-12-24

申请人： Ik Soon Jang ,  Jong Soon Choi ,  Joseph Kwon ,  Dong-Gi Lee ,  Kyeong Eun Yang

发明人： Ik Soon Jang ,  Jong Soon Choi ,  Joseph Kwon ,  Dong-Gi Lee ,  Kyeong Eun Yang

IPC分类号： G01N33/566 ,  G01N21/78 ,  C07K16/18 ,  G01N21/64 ,  C07K14/47 ,  C12Q1/68 ,  G01N27/62

CPC分类号： C07K16/18 ,  G01N33/6887 ,  G01N2333/82

摘要： The present invention relates to a beef-specific age determination marker containing the p21 protein, to a beef-specific age determination kit containing an antibody which is specifically bound to the p21 protein, and to a method which involves detecting the p21 protein through an antigen-antibody binding reaction using an antibody which is specifically bound to the p21 protein serving as a beef-specific age determination marker in the muscle tissue of beef, so as to determine the age of the beef. According to the present invention, the p21 protein is significantly greatly expressed in the muscle tissue of beef, the age of which is lower than 30 months, and is hardly expressed in the muscle tissue of beef, the age of which is greater than 30 months, and thus can be valuably used as a beef-specific age determination marker.

摘要翻译： 本发明涉及含有p21蛋白的牛肉特异性年龄测定标记物，其含有与p21蛋白特异性结合的抗体的牛肉特异性年龄测定试剂盒以及涉及通过抗原检测p21蛋白质的方法 - 抗体结合反应，其使用特异性结合于牛肉肌肉组织中的牛肉特异性年龄测定标记物的p21蛋白质的抗体，以确定牛肉的年龄。 根据本发明，p21蛋白在牛肉肌肉组织中的表达显着高于30个月，几乎不能在牛肉的肌肉组织中表达，其年龄大于30个月 ，因此可以有价值地用作牛肉特异性年龄确定标记。

公开(公告)号：US5805498A

公开(公告)日：1998-09-08

申请号：US715577

申请日：1996-09-19

申请人： Seung-Keun Lee ,  Dong-Gi Lee

发明人： Seung-Keun Lee ,  Dong-Gi Lee

IPC分类号： G11C17/00 ,  G11C16/04

CPC分类号： G11C16/0483

摘要： A nonvolatile semiconductor memory device has one sense amplifier coupled to multiple bit lines and coupled to multiple memory cell strings to reduce the number of selection transistors per cell string and improve density. The invention is most useful in a NAND-type flash memory device.

摘要翻译： 非易失性半导体存储器件具有耦合到多个位线的一个读出放大器并耦合到多个存储器单元串，以减少每个单元串的选择晶体管的数量并提高密度。 本发明在NAND型闪存器件中是最有用的。