公开(公告)号：US09448905B2

公开(公告)日：2016-09-20

申请号：US14262897

申请日：2014-04-28

Applicant: Jeong Uk Kang ,  Jee Seok Hyun ,  Eun Jin Yun

Inventor： Jeong Uk Kang ,  Jee Seok Hyun ,  Eun Jin Yun

IPC: G06F11/30 ,  G06F11/34

CPC classification number: G06F11/3034 ,  G06F11/3419 ,  G06F11/3485

Abstract: A method of controlling a storage device comprises monitoring whether a quality of service (QoS) of the storage device satisfies a quality condition set through a host, and adjusting a current setting of at least one operation metric of the storage device related to the QoS, according to a result of the monitoring.

Abstract translation: 控制存储装置的方法包括：监视存储装置的服务质量（QoS）是否满足通过主机设置的质量状况，以及调整与所述QoS有关的所述存储装置的至少一个操作度量的当前设置， 根据监测的结果。

公开(公告)号：US20160041876A1

公开(公告)日：2016-02-11

申请号：US14921614

申请日：2015-10-23

Applicant: Eun-Jin Yun

Inventor： Eun-Jin Yun

IPC: G06F11/10

CPC classification number: G06F11/1076 ,  G06F11/1004 ,  G06F11/1048 ,  G06F11/1068

Abstract: A method of reading from a memory module which includes a plurality of memories is provided. The method includes reading data corresponding to a plurality of burst length units from the plurality of memories; correcting an error of the read data using a storage error correction code; and outputting the error corrected data by a unit of data corresponding to one burst length unit.

Abstract translation: 提供了一种从包括多个存储器的存储器模块读取的方法。 该方法包括从多个存储器中读取对应于多个突发长度单元的数据; 使用存储错误校正码校正读取数据的错误; 并通过对应于一个突发长度单位的数据单元输出纠错数据。

公开(公告)号：US08745312B2

公开(公告)日：2014-06-03

申请号：US12071498

申请日：2008-02-21

Applicant: Eun-Jin Yun ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Jin-Hyuk Kim

Inventor： Eun-Jin Yun ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Jin-Hyuk Kim

IPC: G06F12/06

CPC classification number: G06F12/0246 ,  G06F2212/7201

Abstract: A non-volatile memory may include a plurality of map blocks for storing a plurality of map units, the map units representing mapping information between physical addresses and logical addresses. A storage device may include such a non-volatile memory. A method of mapping such a non-volatile memory may include writing historical information regarding locations of valid map units among the map units included in map blocks previously allocated among the map blocks when a new map block among the map blocks is allocated, the valid map units representing valid mapping information, and constructing a map table including all of the valid mapping information based on the historical information and a result of searching a map block recently allocated among the map blocks.

Abstract translation: 非易失性存储器可以包括用于存储多个地图单元的多个地图块，地图单元表示物理地址和逻辑地址之间的映射信息。 存储设备可以包括这样的非易失性存储器。 映射这种非易失性存储器的方法可以包括：当分配地图块中的新映射块之前，在地图块之前分配的映射块中包括的映射单元中的有效映射单元的位置的写入历史信息，有效映射 表示有效映射信息的单元，以及基于历史信息构建包括所有有效映射信息的映射表，以及搜索最近在映射块中分配的映射块的结果。

公开(公告)号：US20140122974A1

公开(公告)日：2014-05-01

申请号：US14063281

申请日：2013-10-25

Applicant: Eun-Jin YUN

Inventor： Eun-Jin YUN

IPC: G06F11/10

CPC classification number: G06F11/1076 ,  G06F11/1004 ,  G06F11/1048 ,  G06F11/1068

Abstract: A method of reading from a memory module which includes a plurality of memories is provided. The method includes reading data corresponding to a plurality of burst length units from the plurality of memories; correcting an error of the read data using a storage error correction code; and outputting the error corrected data by a unit of data corresponding to one burst length unit.

Abstract translation: 提供了一种从包括多个存储器的存储器模块读取的方法。 该方法包括从多个存储器中读取对应于多个突发长度单元的数据; 使用存储错误校正码校正读取数据的错误; 并通过对应于一个突发长度单位的数据单元输出纠错数据。

公开(公告)号：US20140112082A1

公开(公告)日：2014-04-24

申请号：US14059852

申请日：2013-10-22

Applicant: Wonseok LEE ,  Eun-Jin YUN ,  Youngkug MOON ,  Seongsik HWANG ,  Donghyun SOHN

Inventor： Wonseok LEE ,  Eun-Jin YUN ,  Youngkug MOON ,  Seongsik HWANG ,  Donghyun SOHN

IPC: G11C7/00

CPC classification number: G11C16/22 ,  G11C7/06 ,  G11C7/20 ,  G11C8/20

Abstract: A nonvolatile memory is provided which includes a memory cell array including a plurality of nonvolatile memory cells; a decoder connected with the memory cell array through a plurality of word lines; a data input/output circuit connected with the memory cell array through a plurality of bit lines; a voltage detector configured to detect a variation in a power supply voltage to output a voltage variation signal; and control logic configured to control the decoder and the data input/output circuit such that data stored at the memory cell array is invalidated in response to the voltage variation signal.

Abstract translation: 提供一种非易失性存储器，其包括：包括多个非易失性存储单元的存储单元阵列; 通过多个字线与存储单元阵列连接的解码器; 通过多个位线与存储单元阵列连接的数据输入/输出电路; 电压检测器，被配置为检测电源电压的变化以输出电压变化信号; 以及控制逻辑，被配置为控制解码器和数据输入/输出电路，使得存储在存储单元阵列处的数据响应于电压变化信号而无效。

公开(公告)号：US20130170296A1

公开(公告)日：2013-07-04

申请号：US13597447

申请日：2012-08-29

Applicant: EUN-JIN YUN

Inventor： EUN-JIN YUN

IPC: G11C16/06

CPC classification number: G11C16/06 ,  G06F11/1072 ,  G11C16/3454 ,  G11C16/349

Abstract: Disclosed is an error correcting method of a memory controller which controls a nonvolatile memory device. The error correcting method includes judging whether first read data read from the nonvolatile memory device is correctable; reading second read data from the nonvolatile memory device when the first read data is uncorrectable; and correcting an error of the first read data based on error information of the second read data and error information of the first read data.

Abstract translation: 公开了一种控制非易失性存储装置的存储器控​​制器的纠错方法。 误差校正方法包括判断从非易失性存储器件读取的第一读取数据是否可校正; 当第一读取数据不可校正时，从非易失性存储器件读取第二读取数据; 以及基于第二读取数据的错误信息和第一读取数据的错误信息来校正第一读取数据的错误。

公开(公告)号：US20080209161A1

公开(公告)日：2008-08-28

申请号：US12071498

申请日：2008-02-21

Applicant: Eun-Jin Yun ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Jin-Hyuk Kim

Inventor： Eun-Jin Yun ,  Hye-Young Kim ,  Young-Joon Choi ,  Dong-Gi Lee ,  Jin-Hyuk Kim

IPC: G06F12/06

CPC classification number: G06F12/0246 ,  G06F2212/7201

Abstract: A non-volatile memory may include a plurality of map blocks for storing a plurality of map units, the map units representing mapping information between physical addresses and logical addresses. A storage device may include such a non-volatile memory. A method of mapping such a non-volatile memory may include writing historical information regarding locations of valid map units among the map units included in map blocks previously allocated among the map blocks when a new map block among the map blocks is allocated, the valid map units representing valid mapping information, and constructing a map table including all of the valid mapping information based on the historical information and a result of searching a map block recently allocated among the map blocks.

Abstract translation: 非易失性存储器可以包括用于存储多个地图单元的多个地图块，地图单元表示物理地址和逻辑地址之间的映射信息。 存储设备可以包括这样的非易失性存储器。 映射这种非易失性存储器的方法可以包括：当分配地图块中的新映射块时，在地图块之前分配的映射块中包括的映射单元中的有效映射单元的位置的写入历史信息，有效映射 表示有效映射信息的单元，以及基于历史信息构建包括所有有效映射信息的映射表，以及搜索最近在映射块中分配的映射块的结果。

公开(公告)号：US08755224B2

公开(公告)日：2014-06-17

申请号：US13358534

申请日：2012-01-26

Applicant: Eun-jin Yun ,  Sang-chul Kang ,  Seung-jae Lee

Inventor： Eun-jin Yun ,  Sang-chul Kang ,  Seung-jae Lee

IPC: G11C11/34

CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/06 ,  G11C16/10 ,  G11C16/24 ,  G11C16/3404

Abstract: A nonvolatile memory device comprises a memory cell array, a page buffer, and a bit line connection signal controller. The memory cell array comprises a plurality of word lines and bit lines arranged in rows and columns, and a plurality of memory cells connected to the respective word lines and bit lines. The page buffer connects a selected bit line among the plurality of bit lines to the page buffer, applies a precharge voltage to the selected bit line, and senses a voltage of the selected bit line after developing of the selected bit line according to a bit line connection signal, during a read operation. The bit line connection signal controller changes the bit line connection signal according to a control signal, during the read operation.

Abstract translation: 非易失性存储器件包括存储单元阵列，页缓冲器和位线连接信号控制器。 存储单元阵列包括排列成行和列的多个字线和位线，以及连接到各个字线和位线的多个存储单元。 页面缓冲器将多个位线中的选定位线连接到页面缓冲器，对所选择的位线施加预充电电压，并根据位线在所选位线显影之后感测所选位线的电压 连接信号，在读操作期间。 在读操作期间，位线连接信号控制器根据控制信号改变位线连接信号。

公开(公告)号：US20080109588A1

公开(公告)日：2008-05-08

申请号：US11565184

申请日：2006-11-30

Applicant: Eun-Jin Yun ,  Jin-Hyuk Kim ,  Dong-Gi Lee ,  Shea-Yun Lee

Inventor： Eun-Jin Yun ,  Jin-Hyuk Kim ,  Dong-Gi Lee ,  Shea-Yun Lee

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  Y02D10/13

Abstract: A memory card capable of having an increased number of meta blocks and a method of driving the memory card. A method of reading data from the memory card includes receiving logical addresses from a host. It is determined whether memory blocks corresponding to the received logical addresses belong to a first region allocated to a user data region in the memory card or a second region including meta blocks in the memory card. The memory blocks corresponding to the logical addresses are masked as erased blocks when the memory blocks belong to the second region.

Abstract translation: 一种能够增加元数据块的存储卡和驱动存储卡的方法。 从存储卡读取数据的方法包括从主机接收逻辑地址。 确定与接收到的逻辑地址相对应的存储器块是否属于分配给存储卡中的用户数据区域的第一区域或包括存储卡中的元块的第二区域。 当存储器块属于第二区域时，对应于逻辑地址的存储器块被屏蔽为擦除块。

公开(公告)号：US09201725B2

公开(公告)日：2015-12-01

申请号：US14063281

申请日：2013-10-25

Applicant: Eun-Jin Yun

Inventor： Eun-Jin Yun

IPC: G11C29/42 ,  G06F11/10 ,  G11C29/54

CPC classification number: G06F11/1076 ,  G06F11/1004 ,  G06F11/1048 ,  G06F11/1068

Abstract: A method of reading from a memory module which includes a plurality of memories is provided. The method includes reading data corresponding to a plurality of burst length units from the plurality of memories; correcting an error of the read data using a storage error correction code; and outputting the error corrected data by a unit of data corresponding to one burst length unit.

Abstract translation: 提供了一种从包括多个存储器的存储器模块读取的方法。 该方法包括从多个存储器中读取对应于多个突发长度单元的数据; 使用存储错误校正码校正读取数据的错误; 并通过对应于一个突发长度单位的数据单元输出纠错数据。