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    POWER EFFICIENT AND SCALABLE CO-PACKAGED OPTICAL DEVICES
    2.
    发明申请
    POWER EFFICIENT AND SCALABLE CO-PACKAGED OPTICAL DEVICES 有权

    公开(公告)号：US20220103261A1

    公开(公告)日：2022-03-31

    申请号：US17478095

    申请日：2021-09-17

    Applicant: Juniper Networks, Inc.

    Inventor： Domenico Di Mola ,  Steven B. Alleston ,  Zhen Qu ,  Ryan Holmes

    IPC: H04B10/40 ,  H04L27/34 ,  H04L1/00

    Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.

    POWER EFFICIENT AND SCALABLE CO-PACKAGED OPTICAL DEVICES
    3.
    发明公开
    POWER EFFICIENT AND SCALABLE CO-PACKAGED OPTICAL DEVICES 审中-公开

    公开(公告)号：US20230291478A1

    公开(公告)日：2023-09-14

    申请号：US18197266

    申请日：2023-05-15

    Applicant: Juniper Networks, Inc.

    Inventor： Domenico Di Mola ,  Steven B. Alleston ,  Zhen Qu ,  Ryan Holmes

    IPC: H04B10/40 ,  H04L1/00 ,  H04L27/34

    CPC classification number: H04B10/40 ,  H04L1/0041 ,  H04L1/0045 ,  H04L27/34

    Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.

    Power efficient and scalable co-packaged optical devices
    5.
    发明授权
    Power efficient and scalable co-packaged optical devices 有权

    公开(公告)号：US11159240B1

    公开(公告)日：2021-10-26

    申请号：US17038453

    申请日：2020-09-30

    Applicant: Juniper Networks, Inc.

    Inventor： Domenico Di Mola ,  Steven B. Alleston ,  Zhen Qu ,  Ryan Holmes

    IPC: H04B10/40 ,  H04L27/34 ,  H04L1/00

    Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.

    PROBABILISTICALLY SHAPED UNAMPLIFIED OPTICAL SIGNALING
    7.
    发明申请
    PROBABILISTICALLY SHAPED UNAMPLIFIED OPTICAL SIGNALING 有权

    公开(公告)号：US20230043960A1

    公开(公告)日：2023-02-09

    申请号：US17392782

    申请日：2021-08-03

    Applicant: Juniper Networks, Inc.

    Inventor： Zhen Qu ,  Xiao Han ,  Yang Yue

    IPC: H04Q11/00 ,  H04J14/02 ,  H04B10/54 ,  G06N7/00

    Abstract: An optical transmitter can generate probabilistically shaped quadrature amplitude modulation (PS-QAM) signaling for transmission over a fiber to a destination without optical amplification. The single fiber can transmit the PS-QAM signaling using dense wavelength division multiplexing having a relatively large number of channels that are closely spaced. A coherent receiver can receive the PS-QAM signaling for decoding without implementing chromatic dispersion compensation.

    Power efficient and scalable co-packaged optical devices
    8.
    发明授权
    Power efficient and scalable co-packaged optical devices 有权

    公开(公告)号：US12267111B2

    公开(公告)日：2025-04-01

    申请号：US18197266

    申请日：2023-05-15

    Applicant: Juniper Networks, Inc.

    Inventor： Domenico Di Mola ,  Steven B. Alleston ,  Zhen Qu ,  Ryan Holmes

    IPC: H04B10/40 ,  H04L1/00 ,  H04L27/34

    Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.

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