公开(公告)号：US20140167133A1

公开(公告)日：2014-06-19

申请号：US14108633

申请日：2013-12-17

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Izumi HIRANO ,  Yuichiro Mitani ,  Masayasu Miyata ,  Yasushi Nakasaki ,  Koichi Kato ,  Daisuke Matsushita ,  Akira Takashima ,  Misako Morota

IPC分类号： H01L29/788 ,  H01L29/792

CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11556 ,  H01L29/42332 ,  H01L29/511 ,  H01L29/7881 ,  H01L29/7889

摘要： A nonvolatile semiconductor memory according to an embodiment includes: a semiconductor region; a first insulating film formed on the semiconductor region; a charge storage film formed on the first insulating film; a hydrogen diffusion preventing film formed on the charge storage film; a second insulating film formed on the hydrogen diffusion preventing film; a control gate electrode formed on the second insulating film; a hydrogen discharge film formed on the control gate electrode; and a sidewall formed on a side surface of a multilayer structure including the first insulating film, the charge storage film, the hydrogen diffusion preventing film, the second insulating film, and the control gate electrode, the sidewall containing a material for preventing hydrogen from diffusing.

摘要翻译： 根据实施例的非易失性半导体存储器包括：半导体区域; 形成在半导体区域上的第一绝缘膜; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上的氢扩散防止膜; 在氢扩散防止膜上形成的第二绝缘膜; 形成在所述第二绝缘膜上的控制栅电极; 形成在控制栅电极上的氢放电膜; 以及形成在包括第一绝缘膜，电荷存储膜，氢扩散防止膜，第二绝缘膜和控制栅电极的多层结构的侧表面上的侧壁，所述侧壁包含用于防止氢扩散的材料 。

公开(公告)号：US20140227989A1

公开(公告)日：2014-08-14

申请号：US14108651

申请日：2013-12-17

申请人： Kabushiki Kaisha Toshiba

发明人： Masamichi SUZUKI ,  Hirotaka NISHINO ,  Kazuya Matsuzawa ,  Izumi HIRANO ,  Takao MARUKAME ,  Yusuke HIGASHI ,  Takahiro KURITA ,  Yuki SASAKI ,  Yuichiro MITANI

IPC分类号： H03M1/66 ,  H03D7/14 ,  H04B1/16 ,  H01L27/115

CPC分类号： H04B1/16 ,  H01L29/792 ,  H03D7/1441 ,  H03D7/1458 ,  H03M1/108 ,  H03M1/745

摘要： According to an embodiment, a semiconductor circuit includes a substrate, a tunnel oxide film, a charge storage film, a blocking layer, and plural nodes. The substrate is made of a semiconductor in which two diffusion layers each serving as either a source or a drain are formed. The tunnel oxide film is formed on a region of the substrate between the diffusion layers. The charge storage film is formed on the tunnel oxide layer and stores charge. The blocking layer is formed between the charge storage film and a gate electrode and has layers of a first oxide film, a nitride film and a second oxide film to have a thickness of 5 nm or larger but 15 nm or smaller. The nodes allow external application of voltages so that the source and the drain are reversed and allow detection a gate voltage, a drain current and a substrate current.

摘要翻译： 根据实施例，半导体电路包括衬底，隧道氧化物膜，电荷存储膜，阻挡层和多个节点。 衬底由其中形成有源极或漏极的两个扩散层的半导体构成。 隧道氧化膜形成在扩散层之间的衬底的区域上。 电荷存储膜形成在隧道氧化物层上并存储电荷。 阻挡层形成在电荷存储膜和栅电极之间，并且具有第一氧化膜，氮化物膜和第二氧化物膜的层，其厚度为5nm以上但为15nm以下。 节点允许外部施加电压，使得源极和漏极反向，并且允许检测栅极电压，漏极电流和衬底电流。