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公开(公告)号：US09634248B2
公开(公告)日：2017-04-25
申请号：US15061552
申请日：2016-03-04
CPC分类号： H01L29/517 , H01B3/10 , H01L21/28017 , H01L27/11507 , H01L27/11514 , H01L27/1159 , H01L27/11597 , H01L27/2463 , H01L29/516 , H01L29/78391 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/1625 , H01L2924/13091
摘要： According to one embodiment, an insulator includes a material including barium and hafnium oxide. The material has a crystal structure of a space group Pbc21.
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公开(公告)号：US09601192B2
公开(公告)日：2017-03-21
申请号：US14621071
申请日：2015-02-12
CPC分类号： G11C13/0069 , G11C11/5614 , G11C13/0004 , G11C13/0007 , G11C13/0011 , G11C13/004 , G11C13/0097 , G11C2013/005 , G11C2013/0073 , G11C2013/009 , G11C2013/0092 , G11C2213/15 , G11C2213/33 , H01L27/101 , H01L27/2409 , H01L45/085 , H01L45/1233 , H01L45/142 , H01L45/148
摘要： According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the second electrode. The control circuit applies a voltage between the first electrode and the second electrode to perform writing, erasing, and reading. During the writing, the control circuit applies a first voltage pulse between the first electrode and the second electrode, and then applies a second voltage pulse different in polarity from the first voltage pulse after applying the first voltage pulse.
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3.发明授权公开(公告)号：US09502431B2
公开(公告)日：2016-11-22
申请号：US14747167
申请日：2015-06-23
发明人： Kiwamu Sakuma , Kensuke Ota , Masumi Saitoh , Chika Tanaka , Daisuke Matsushita
IPC分类号： H01L27/115 , H01L29/66 , H01L21/02 , H01L29/24 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11582 , H01L27/11556 , H01L29/24 , H01L29/66969 , H01L29/7889 , H01L29/7926
摘要： According to one embodiment, a memory device includes a first stacked layer structure stacked in order of a first insulating layer, a first electrode layer, . . . an n-th insulating layer, an n-th electrode layer, and an (n+1)-th insulating layer in a first direction perpendicular to a surface of a semiconductor substrate, where n is a natural number, an oxide semiconductor layer extending through the first to n-th electrode layers in the first direction, a second stacked layer structure provided between the first to n-th electrode layers and the oxide semiconductor layer, and including a charge storage layer which storages charges, and a area provided in the oxide semiconductor layer.
摘要翻译： 根据一个实施例，存储器件包括按照第一绝缘层，第一电极层的顺序堆叠的第一堆叠层结构。 。 。 第n绝缘层，第n电极层和第（n + 1）绝缘层，其垂直于半导体衬底的表面的第一方向，其中n是自然数，氧化物半导体层延伸 通过在第一方向上的第一至第n电极层，设置在第一至第n电极层和氧化物半导体层之间的第二堆叠层结构，并且包括存储电荷的电荷存储层，以及设置在 氧化物半导体层。
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公开(公告)号：US09391272B2
公开(公告)日：2016-07-12
申请号：US14458785
申请日：2014-08-13
CPC分类号： H01L45/14 , H01L27/101 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1253 , H01L45/1266 , H01L45/148 , H01L45/1616
摘要： According to one embodiment, a nonvolatile variable resistance element includes a first electrode, a second electrode, a variable resistance layer, and a dielectric layer. The second electrode includes a metal element. The variable resistance layer is arranged between the first electrode and the second electrode. A resistance change is reversibly possible in the variable resistance layer according to move the metal element in and out. The dielectric layer is inserted between the second electrode and the variable resistance layer and has a diffusion coefficient of the metal element smaller than that of the variable resistance layer.
摘要翻译： 根据一个实施例，非易失性可变电阻元件包括第一电极，第二电极，可变电阻层和电介质层。 第二电极包括金属元件。 可变电阻层设置在第一电极和第二电极之间。 根据使金属元件进出的可变电阻层，电阻变化是可逆的。 电介质层插入在第二电极和可变电阻层之间，并且金属元素的扩散系数小于可变电阻层的扩散系数。
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公开(公告)号：US20150084113A1
公开(公告)日：2015-03-26
申请号：US14483280
申请日：2014-09-11
IPC分类号： H01L29/51 , H01L27/115 , H01L29/788
CPC分类号： H01L21/02332 , H01L21/0214 , H01L21/02164 , H01L21/022 , H01L21/02238 , H01L21/02252 , H01L21/3145 , H01L27/115 , H01L27/11517 , H01L27/11521 , H01L27/11568 , H01L29/40114 , H01L29/40117 , H01L29/4234 , H01L29/4916 , H01L29/513 , H01L29/518 , H01L29/78 , H01L29/788 , H01L29/792
摘要： It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.
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公开(公告)号：US20140167133A1
公开(公告)日：2014-06-19
申请号：US14108633
申请日：2013-12-17
发明人： Izumi HIRANO , Yuichiro Mitani , Masayasu Miyata , Yasushi Nakasaki , Koichi Kato , Daisuke Matsushita , Akira Takashima , Misako Morota
IPC分类号： H01L29/788 , H01L29/792
CPC分类号： H01L29/792 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L29/42332 , H01L29/511 , H01L29/7881 , H01L29/7889
摘要： A nonvolatile semiconductor memory according to an embodiment includes: a semiconductor region; a first insulating film formed on the semiconductor region; a charge storage film formed on the first insulating film; a hydrogen diffusion preventing film formed on the charge storage film; a second insulating film formed on the hydrogen diffusion preventing film; a control gate electrode formed on the second insulating film; a hydrogen discharge film formed on the control gate electrode; and a sidewall formed on a side surface of a multilayer structure including the first insulating film, the charge storage film, the hydrogen diffusion preventing film, the second insulating film, and the control gate electrode, the sidewall containing a material for preventing hydrogen from diffusing.
摘要翻译： 根据实施例的非易失性半导体存储器包括：半导体区域; 形成在半导体区域上的第一绝缘膜; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上的氢扩散防止膜; 在氢扩散防止膜上形成的第二绝缘膜; 形成在所述第二绝缘膜上的控制栅电极; 形成在控制栅电极上的氢放电膜; 以及形成在包括第一绝缘膜，电荷存储膜，氢扩散防止膜，第二绝缘膜和控制栅电极的多层结构的侧表面上的侧壁，所述侧壁包含用于防止氢扩散的材料 。
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公开(公告)号：US09685462B2
公开(公告)日：2017-06-20
申请号：US14791653
申请日：2015-07-06
发明人： Kensuke Ota , Masumi Saitoh , Kiwamu Sakuma , Daisuke Matsushita , Chika Tanaka
IPC分类号： H01L27/12 , H01L29/786 , H01L29/66 , H01L21/467 , H01L21/477 , H01L21/465 , H01L27/06 , H01L21/8258 , H01L27/088
CPC分类号： H01L27/1225 , H01L21/465 , H01L21/467 , H01L21/477 , H01L21/8258 , H01L27/0688 , H01L27/088 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： A semiconductor device of an embodiment includes an oxide semiconductor layer including a first region, a second region and the third region provided between the first region and the second region. The oxide semiconductor layer contains indium (In), gallium (Ga), and zinc (Zn). The first and second regions have thinner film thickness and lower indium (In) concentration than the third region. An insulating film is provided on the third region, and an electrode is provided on the insulating film. A first conductive layer is provided under the first region and electrically connected with the first region. A second conductive layer is provided under the second region and electrically connected with the second region.
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公开(公告)号：US20150380641A1
公开(公告)日：2015-12-31
申请号：US14843050
申请日：2015-09-02
发明人： Tsunehiro INO , Riichiro Takaishi , Koichi Kato , Yasushi Nakasaki , Takamitsu Ishihara , Daisuke Matsushita
CPC分类号： H01L45/06 , C01G25/02 , C01G27/00 , C01G27/02 , G11C11/22 , H01L27/11507 , H01L27/11514 , H01L27/1159 , H01L27/11597 , H01L28/40 , H01L29/516 , H01L29/78391 , H01L29/7843 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146
摘要： A semiconductor device according to an embodiment includes a first conductive layer, a second conductive layer, and a dielectric film provided between the first and the second conductive layers. The dielectric film including a fluorite-type crystal and a positive ion site includes Hf and/or Zr, and a negative ion site includes O. In the dielectric film, parameters a, b, c, p, x, y, z, u, v and w satisfy a predetermined relation. The axis length of the a-axis, b-axis and c-axis of the original unit cell is a, b, and c, respectively. An axis in a direction with no reversal symmetry is c-axis, a stacking direction of atomic planes of two kinds formed by negative ions disposed at different positions is a-axis, the remainder is b-axis. The parameters x, y, z, u, v and w are values represented using the parameter p.
摘要翻译： 根据实施例的半导体器件包括第一导电层，第二导电层和设置在第一和第二导电层之间的电介质膜。 包括萤石型晶体和正离子位置的电介质膜包括Hf和/或Zr，负离子位置包括O.在电介质膜中，参数a，b，c，p，x，y，z，u ，v和w满足预定关系。 原始单元的a轴，b轴和c轴的轴长分别为a，b和c。 不具有反转对称方向的轴为c轴，由位于不同位置的负离子形成的两种原子平面的堆叠方向为a轴，其余为b轴。 参数x，y，z，u，v和w是使用参数p表示的值。
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公开(公告)号：US20140239373A1
公开(公告)日：2014-08-28
申请号：US13939351
申请日：2013-07-11
IPC分类号： H01L29/792 , H01L29/66
CPC分类号： H01L27/1157 , H01L21/02183 , H01L21/28185 , H01L21/28273 , H01L21/28282 , H01L21/324 , H01L27/11521 , H01L27/11556 , H01L27/11563 , H01L29/66825 , H01L29/66833 , H01L29/792
摘要： According to one embodiment, a semiconductor memory device includes a semiconductor member, a first insulating layer provided on the semiconductor member, a TaN layer provided on the first insulating layer and containing tantalum and nitrogen, a TaSiN layer provided on the TaN layer in contact with the TaN layer and containing tantalum, silicon, and nitrogen, a second insulating layer provided on the TaSiN layer in contact with the TaSiN layer and containing oxygen, and a control electrode provided on the second insulating layer.
摘要翻译： 根据一个实施例，半导体存储器件包括半导体部件，设置在半导体部件上的第一绝缘层，设置在第一绝缘层上并包含钽和氮的TaN层，设置在与TaN层接触的TaN层上的TaSiN层 TaN层，并且含有钽，硅和氮，设置在与TaSiN层接触并含有氧的TaSiN层上的第二绝缘层，以及设置在第二绝缘层上的控制电极。
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公开(公告)号：US20140133210A1
公开(公告)日：2014-05-15
申请号：US14044076
申请日：2013-10-02
CPC分类号： G11C13/0069 , G11C13/0011 , G11C13/003 , G11C13/004 , G11C2213/76 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/145 , H01L45/146
摘要： An element according to an embodiment can transit between at least two states including a low-resistance state and a high-resistance state. The element comprises a first electrode, a second electrode, a first layer and a second layer. The first electrode includes metal elements. The first layer is located between the first electrode and the second electrode while contacting with the first electrode. The second layer is located between the first layer and the second electrode. At the low-resistance state, a density of the metal elements in the first layer is higher than that of the metal elements in the second layer. The density of the metal elements in the first layer at the low-resistance state is higher than that of the metal elements in the first layer at the high-resistance state. A relative permittivity of the second layer is higher than a relative permittivity of the first layer.
摘要翻译： 根据实施例的元件可以在包括低电阻状态和高电阻状态的至少两种状态之间转移。 元件包括第一电极，第二电极，第一层和第二层。 第一电极包括金属元件。 第一层位于第一电极和第二电极之间，同时与第一电极接触。 第二层位于第一层和第二层之间。 在低电阻状态下，第一层中的金属元素的密度高于第二层中的金属元素的密度。 在低电阻状态下，第一层中的金属元素的密度高于高电阻状态下的第一层中的金属元素的密度。 第二层的相对介电常数高于第一层的相对介电常数。
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