Memory system and method
    1.
    发明授权

    公开(公告)号:US11581052B2

    公开(公告)日:2023-02-14

    申请号:US17010914

    申请日:2020-09-03

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a controller. The memory includes a plurality of storage areas. Each of the storage areas includes a plurality of memory cells to which threshold voltages are set in accordance with data. The controller acquires a first threshold voltage distribution of memory cells in a first storage area of the storage areas. The controller acquires a second threshold voltage distribution of memory cells in a second storage area of the storage areas. The controller detects non-normalcy in the first storage area or the second storage area from a first divergence quantity between the first threshold voltage distribution and the second threshold voltage distribution.

    Memory system and controller
    2.
    发明授权

    公开(公告)号:US11947400B2

    公开(公告)日:2024-04-02

    申请号:US18200453

    申请日:2023-05-22

    CPC classification number: G06F1/263 G06F12/0246 G06F2212/2028 G06F2212/205

    Abstract: In a memory system in an embodiment, in a case of normal operation, a control unit returns a write completion response upon completion of reception of write data from a host, and writes the write data into nonvolatile memory in a multiple values. In a case of unordinary power-off, changeover to operation using a backup battery is conducted and the control unit writes dirty data that is not completed in writing into the nonvolatile memory, into the nonvolatile memory with two values. When next boot, the control unit reads the dirty data from the nonvolatile memory into the volatile memory, and thereafter writes the dirty data into the nonvolatile memory in a multiple values.

    Memory system and controller
    3.
    发明授权

    公开(公告)号:US11435799B2

    公开(公告)日:2022-09-06

    申请号:US16988326

    申请日:2020-08-07

    Abstract: In a memory system in an embodiment, in a case of normal operation, a control unit returns a write completion response upon completion of reception of write data from a host, and writes the write data into nonvolatile memory in a multiple values. In a case of unordinary power-off, changeover to operation using a backup battery is conducted and the control unit writes dirty data that is not completed in writing into the nonvolatile memory, into the nonvolatile memory with two values. When next boot, the control unit reads the dirty data from the nonvolatile memory into the volatile memory, and thereafter writes the dirty data into the nonvolatile memory in a multiple values.

    Memory system and controller
    4.
    发明授权

    公开(公告)号:US11693463B2

    公开(公告)日:2023-07-04

    申请号:US17878788

    申请日:2022-08-01

    CPC classification number: G06F1/263 G06F12/0246 G06F2212/205 G06F2212/2028

    Abstract: In a memory system in an embodiment, in a case of normal operation, a control unit returns a write completion response upon completion of reception of write data from a host, and writes the write data into nonvolatile memory in a multiple values. In a case of unordinary power-off, changeover to operation using a backup battery is conducted and the control unit writes dirty data that is not completed in writing into the nonvolatile memory, into the nonvolatile memory with two values. When next boot, the control unit reads the dirty data from the nonvolatile memory into the volatile memory, and thereafter writes the dirty data into the nonvolatile memory in a multiple values.

    MEMORY SYSTEM AND CONTROLLER
    5.
    发明公开

    公开(公告)号:US20230288973A1

    公开(公告)日:2023-09-14

    申请号:US18200453

    申请日:2023-05-22

    CPC classification number: G06F1/263 G06F12/0246 G06F2212/205 G06F2212/2028

    Abstract: In a memory system in an embodiment, in a case of normal operation, a control unit returns a write completion response upon completion of reception of write data from a host, and writes the write data into nonvolatile memory in a multiple values. In a case of unordinary power-off, changeover to operation using a backup battery is conducted and the control unit writes dirty data that is not completed in writing into the nonvolatile memory, into the nonvolatile memory with two values. When next boot, the control unit reads the dirty data from the nonvolatile memory into the volatile memory, and thereafter writes the dirty data into the nonvolatile memory in a multiple values.

    MEMORY SYSTEM AND CONTROLLER
    6.
    发明申请

    公开(公告)号:US20220365577A1

    公开(公告)日:2022-11-17

    申请号:US17878788

    申请日:2022-08-01

    Abstract: In a memory system in an embodiment, in a case of normal operation, a control unit returns a write completion response upon completion of reception of write data from a host, and writes the write data into nonvolatile memory in a multiple values. In a case of unordinary power-off, changeover to operation using a backup battery is conducted and the control unit writes dirty data that is not completed in writing into the nonvolatile memory, into the nonvolatile memory with two values. When next boot, the control unit reads the dirty data from the nonvolatile memory into the volatile memory, and thereafter writes the dirty data into the nonvolatile memory in a multiple values.

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