公开(公告)号：US20230301109A1

公开(公告)日：2023-09-21

申请号：US17897065

申请日：2022-08-26

Applicant: KIOXIA CORPORATION

Inventor： Tadayoshi UECHI ,  Takeshi SHIMANE

IPC: H01L27/11573 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L27/11526

CPC classification number: H01L27/11573 ,  H01L25/0657 ,  H01L25/18 ,  H01L24/08 ,  H01L27/11526 ,  H01L2224/08145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A semiconductor device has a third region between first and second regions on a substrate surface. A gate insulating film which is above the third region. A gate electrode is above the gate insulating film and includes a metal-containing layer. A first conductor is above the gate electrode. A first voltage can be applied to the first conductor. A second conductor is above the first region. A second voltage can be applied to the second conductor. A third conductor is above the first region. A third voltage different from the first and second can be applied to the third conductor. A metal oxide film is provided between the first region and the third conductor. An upper surface of the metal oxide film includes a portion at a height from the substrate that is lower than a height of an upper surface of the metal-containing layer.

公开(公告)号：US20220084984A1

公开(公告)日：2022-03-17

申请号：US17188308

申请日：2021-03-01

Applicant: Kioxia Corporation

Inventor： Michihito KONO ,  Takashi IZUMIDA ,  Tadayoshi UECHI ,  Takeshi SHIMANE

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11582 ,  H01L27/11573

Abstract: A semiconductor memory device, includes: a first region including a memory cell array; and a second region including a peripheral circuit. The second region includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes: a semiconductor region between the first and second surfaces; an n-type semiconductor region provided on the first surface and higher in donor concentration than the semiconductor region; a damaged region provided on the second surface; and a p-type semiconductor region provided between the damaged region and the n-type semiconductor region, closer to the second surface than the n-type semiconductor region in a direction from the first surface toward the second surfaces of the semiconductor substrate, and higher in acceptor concentration than the semiconductor region.

公开(公告)号：US20220246632A1

公开(公告)日：2022-08-04

申请号：US17409993

申请日：2021-08-24

Applicant: KIOXIA CORPORATION

Inventor： Takeshi SHIMANE

IPC: H01L27/11573 ,  H01L25/065 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11582 ,  H01L29/10

Abstract: A semiconductor device includes a semiconductor substrate that includes a first surface and a second surface, a semiconductor region between the first and second surfaces, a first well region in the first surface and having one of a donor concentration and a acceptor concentration higher than the semiconductor region, a second well region between the first well region and the second surface and having a higher acceptor concentration than the semiconductor region, a third well region between the second well region and the second surface and having a higher donor concentration than the semiconductor region, a conductor surrounding at least a portion of the first well region along the first surface and extending from the first surface to the third well region in a first direction intersecting the first surface, and an insulator between the conductor and the first well region and between the conductor and the second well region.