公开(公告)号：US11309019B2

公开(公告)日：2022-04-19

申请号：US17101431

申请日：2020-11-23

Applicant: KIOXIA CORPORATION

Inventor： Noboru Shibata ,  Tomoharu Tanaka

IPC: G11C11/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/12 ,  G11C16/34 ,  G11C16/10

Abstract: A memory cell array is configured to have a plurality of memory cells arranged in a matrix, each of the memory cells being connected to a word line and a bit line and being capable of storing n values (n is a natural number equal to or larger than 3). A control circuit controls the potentials of the word line and bit line according to input data and writes data into a memory cell. The control circuit writes data into the memory cell to a k-valued threshold voltage (k

公开(公告)号：US11183235B2

公开(公告)日：2021-11-23

申请号：US16887306

申请日：2020-05-29

Applicant: SanDisk Technologies LLC ,  KIOXIA Corporation

Inventor： Tomoharu Tanaka ,  Jian Chen

IPC: G11C16/04 ,  G11C11/56 ,  G11C16/34 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  G11C16/12 ,  G11C16/10

Abstract: A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit writing a data in the memory cells by supplying a write voltage Vpgm and a write control voltage VBL to the memory cell, continuing the writing of the data in the memory cell by changing the value of the write control voltage VBL in response to an advent of a first write state of the memory cell and inhibiting any operation of writing a data to the memory cell by further changing the value of the write control voltage VBL to Vdd in response to an advent of a second write state of the memory cell.

公开(公告)号：US11264108B2

公开(公告)日：2022-03-01

申请号：US17101553

申请日：2020-11-23

Applicant: KIOXIA CORPORATION

Inventor： Noboru Shibata ,  Tomoharu Tanaka

IPC: G11C11/34 ,  G11C16/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/12 ,  G11C16/10

Abstract: Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of 5 first memory cells selected simultaneously by a word line. Thereafter, the write circuit writes the data on a second page into the plurality of first memory cell. Then, the write circuit writes the data on the first and second pages into second memory cells adjoining 10 the first memory cells in the bit line direction.