公开(公告)号：US11158375B2

公开(公告)日：2021-10-26

申请号：US16782114

申请日：2020-02-05

Applicant: Kioxia Corporation

Inventor： Yusuke Niki

IPC: G11C7/14 ,  G11C16/04 ,  G11C16/08 ,  H01L27/11556 ,  H01L27/11582 ,  G11C8/10 ,  G11C16/26

Abstract: A semiconductor storage device includes first signal lines divided into groups respectively including m (m is an integer equal to or larger than 2) of the first signal lines; and second signal lines. A memory cell array includes memory cells provided to correspond to respective intersections of the first signal lines and the second signal lines. A selection voltage is applied to any of the first signal lines through m global signal lines. First transistors are provided to respectively correspond to the first signal lines and connected between the first signal lines and the global signal lines. First selection signal lines are provided to respectively correspond to the groups and connected to gate electrodes of the first transistors included in a corresponding one of the groups in common. First dummy signal lines are arranged between adjacent ones of the groups, to which a non-selection voltage is applied.

公开(公告)号：US11081175B2

公开(公告)日：2021-08-03

申请号：US16943638

申请日：2020-07-30

Applicant: KIOXIA CORPORATION

Inventor： Yusuke Niki ,  Atsushi Kawasumi ,  Takayuki Miyazaki

IPC: G11C13/00 ,  H01L45/00

Abstract: According to one embodiment, a device includes first lines transmitting a first signals; second lines receiving the first signals; and a first circuit including a first selector coupled to the first lines, a second selector coupled to the second lines, third lines and a fourth lines between the first and second selectors. Each of the third lines stores the second signals, each of the fourth lines stores the third signals. The first circuit counts a first number of second signals equivalent to the corresponding first signal; counts a second number of third signals equivalent to corresponding first signal of the first signals; and couples either the third or the fourth lines to the first and second lines via the first and second selectors, based on a result of comparison between the first and the second numbers.

公开(公告)号：US11557538B2

公开(公告)日：2023-01-17

申请号：US17016795

申请日：2020-09-10

Applicant: Kioxia Corporation

Inventor： Yusuke Niki

IPC: H01L23/528 ,  H01L27/24 ,  H01L23/522 ,  G11C11/408 ,  G11C16/08

Abstract: A memory includes first signal lines divided into groups respectively including m (m is an integer equal to or larger than 2) lines, and second signal lines. A memory cell array includes memory cells. (m+2) or more global signal lines are configured to apply a selection voltage to any of the first signal lines. First transistors are provided to correspond to each of the first signal lines in one-to-one correspondence and are connected between the first signal lines and the global signal lines. First selection signal lines are provided to respectively correspond to the groups, and are each connected to gate electrodes of the first transistors included in a corresponding one of the groups in common. The first signal lines located at both ends of each of any two of the groups which are adjacent to each other are connected to mutually different ones of the global signal lines.

公开(公告)号：US11469270B2

公开(公告)日：2022-10-11

申请号：US17167223

申请日：2021-02-04

Applicant: Kioxia Corporation

Inventor： Yusuke Niki

IPC: H01L27/24

Abstract: A memory includes first signal-lines divided into groups. Global signal lines correspond to the first signal-lines. The global signal-lines include a selected global signal-line and a non-selected global signal-line. First transistors correspond to the first signal-lines. The first transistors are connected between a corresponding first signal-line and any of the global signal-lines. Selection signal-lines correspond to the groups. The selection signal-lines are connected to gate electrodes of the first transistors included in a corresponding group. Second transistors are connected between the first signal-lines that belong to adjacent two of the groups. When one of the first signal-lines which is electrically connected to the selected global signal-line is a selected first signal-line, the first transistors corresponding to one of the groups which includes the selected first signal-line is in a conducting state. One of the second transistors which is connected to the selected first signal-line is in a non-conducting state.