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    Method and apparatus for generating quantum error correction code using graph state
    1.
    发明授权
    Method and apparatus for generating quantum error correction code using graph state 有权

    公开(公告)号：US10911067B2

    公开(公告)日：2021-02-02

    申请号：US16309281

    申请日：2016-06-24

    申请人： KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

    发明人： Jun Heo ,  Il Kwon Sohn

    IPC分类号： H03M13/11 ,  H03M13/29 ,  G06N5/00 ,  G06N10/00 ,  H03M13/00 ,  G06F17/16 ,  B82Y10/00 ,  G06F16/901 ,  H04L9/08 ,  G06F17/10

    摘要： Provided is a quantum error correction code generating method using a graph state. According to the exemplary embodiment of the present invention, a quantum error correction code generating method using a graph state: includes: generating a graph state representing an adjacency relationship between a plurality of qubits including at least one entangled qubit (ebit); generating a first stabilizer generator which corresponds to the graph state and is configured by a plurality of stabilizers for detecting errors of the plurality of qubits; and generating at least one logical Z operator used for a phase flip operation of a codeword, at least one logical X operator used for a bit flip operation of a codeword, and a second stabilizer generator which is a sub set of the first stabilizer generator, based on the first stabilizer generator and the at least one entangled qubit.

    METHOD FOR CORRECTING ERROR OF IMPERFECT ENTANGLED QUBIT IN RECEIVER
    4.
    发明申请
    METHOD FOR CORRECTING ERROR OF IMPERFECT ENTANGLED QUBIT IN RECEIVER 审中-公开
    用于校正接收器中不正确的QTL的错误的方法

    公开(公告)号：US20150214984A1

    公开(公告)日：2015-07-30

    申请号：US14602815

    申请日：2015-01-22

    申请人： KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

    发明人： Byung-Kyu Ahn ,  Jun Heo

    IPC分类号： H03M13/29 ,  G06N99/00

    CPC分类号： H03M13/29 ,  G06N10/00 ,  H03M13/613

    摘要： Provided is an EA-CWS quantum error correction code for correcting an error on imperfect entangled qubits, and a method for correcting an error using entangled qubits snared between a sender and a receiver includes, after an encoding process to send the entangled qubits, performing an operation of a Pauli error on different stabilizer generators of an EA-CWS code, converting an error occurring on the sender or the receiver to en error correction code in a correctable error form as a result of the operation, and correcting the error on entangled qubits occurring at the side of the sender or the receiver by generating a word operator of a CWS code using the converted error correction code.

    摘要翻译： 提供了一种用于校正不完美纠缠量子位上的误差的EA-CWS量子纠错码，并且使用在发送器和接收器之间卷绕的纠缠量子比特来校正错误的方法包括：在编码处理之后发送纠缠的量子位，执行 在EA-CWS代码的不同稳定器发生器上操作Pauli误差，将发送器或接收器上发生的错误转换为作为操作结果的可纠正错误形式的纠错码，并纠正纠缠量子位上的误差 通过使用转换的纠错码生成CWS代码的字操作符，发生在发送器或接收器的一侧。

    Low-complexity syndrom based decoding apparatus and method thereof
    6.
    发明授权
    Low-complexity syndrom based decoding apparatus and method thereof 有权

    公开(公告)号：US10917120B2

    公开(公告)日：2021-02-09

    申请号：US16233645

    申请日：2018-12-27

    申请人： KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

    发明人： Jun Heo ,  Byung Kyu Ahn ,  Jong Hyun Lee

    IPC分类号： H03M13/29 ,  H03M13/11

    摘要： The present disclosure relates to a low-complexity syndrome based decoding apparatus and method and a low-complexity syndrome based decoding apparatus includes: a hard decision unit which performs hard decision on a current input value to output a hard decision vector; a syndrome calculator which performs a syndrome operation on the hard decision vector and determines an error type of the hard decision vector based on the syndrome operation result; and a decoder which selects a predetermined decoding algorithm in accordance with the error type to perform the decoding, and the error type includes at least one of no error, a single error, and a double error.

    Method and apparatus for deciding decoding order for shuffled decoding of LDPC codes
    7.
    发明授权
    Method and apparatus for deciding decoding order for shuffled decoding of LDPC codes 有权

    公开(公告)号：US10778249B2

    公开(公告)日：2020-09-15

    申请号：US16122020

    申请日：2018-09-05

    申请人： KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

    发明人： Jun Heo ,  Tae Hyun Kim

    IPC分类号： H03M13/11

    摘要： The method for shuffled decoding of LDPC codes includes calculating check-variable mutual information which is mutual information of a message propagating from a plurality of check nodes to a plurality of variable nodes by a check-variable mutual information calculating unit, calculating variable-check mutual information which is mutual information of a message propagating from the plurality of variable nodes to the plurality of check nodes connected to the plurality of variable nodes based on the check-variable mutual information by a variable-check mutual information calculating unit, and Calculating the entire mutual information which is a sum of variable-check mutual information for each of the plurality of variable nodes and determines an operation order of a variable node having the largest entire mutual information among the plurality of variable nodes to be next, by an operation order determining unit.

    DESIGN OF DVB-S2 LDPC DECODER USING OVERLAPPED DECODING SCHEME
    8.
    发明申请
    DESIGN OF DVB-S2 LDPC DECODER USING OVERLAPPED DECODING SCHEME 有权
    使用重叠解码方案的DVB-S2 LDPC解码器的设计

    公开(公告)号：US20170063395A1

    公开(公告)日：2017-03-02

    申请号：US15132585

    申请日：2016-04-19

    申请人： KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

    发明人： Jun-Young WI ,  Jun Heo ,  Sung Won Kim

    IPC分类号： H03M13/11 ,  H03M13/00

    CPC分类号： H03M13/112 ,  H03M13/1137 ,  H03M13/1165

    摘要： Provided is a low density parity check decoder, which includes a bit node calculating unit configured to calculate a bit node, a check node calculating unit configured to calculate a check node, a control unit configured to control calculation of the bit node and the check node, and a storage unit configured to store calculation values of the bit node or the check node, wherein the control unit calculates the bit node or the check node so that the node calculations are overlapped, by using an address offset value of the storage unit, thereby reducing a decoding time.

    摘要翻译： 提供了一种低密度奇偶校验解码器，其包括：被配置为计算比特节点的比特节点计算单元，被配置为计算校验节点的校验节点计算单元，被配置为控制比特节点和校验节点的计算的控制单元 以及存储单元，其被配置为存储所述比特节点或所述校验节点的计算值，其中，所述控制单元通过使用所述存储单元的地址偏移值来计算所述比特节点或所述校验节点，使得所述节点计算重叠， 从而减少了解码时间。

    METHOD FOR GENERATING RANDOM NUMBER
    10.
    发明申请
    METHOD FOR GENERATING RANDOM NUMBER 有权

    公开(公告)号：US20230037690A1

    公开(公告)日：2023-02-09

    申请号：US17564445

    申请日：2021-12-29

    申请人： Korea University Research and Business Foundation

    发明人： Jun Heo ,  Joo Youn Park

    IPC分类号： G06F7/58

    摘要： Disclosed is a method for generating a random number, which is performed by a computing device including at least one processor. The method for generating a random number may include: recognizing the number of detection times at which a single photon detector (SPD) detects a dark count; and generating a random number based on a bit value allocated to a section including the number of detection times among a plurality of sections.