公开(公告)号：US20230368977A1

公开(公告)日：2023-11-16

申请号：US18315724

申请日：2023-05-11

Applicant: KYOCERA AVX Components Corporation

Inventor： Marianne Berolini ,  Jeffrey Horn ,  Fumihiko Hidaka ,  Yuki Inanaga

IPC: H01G4/30 ,  H01G4/232 ,  H01G4/12 ,  H01G4/012 ,  H01G2/06 ,  H01G4/008

CPC classification number: H01G4/30 ,  H01G4/232 ,  H01G4/12 ,  H01G4/012 ,  H01G2/065 ,  H01G4/008

Abstract: A broadband multilayer ceramic capacitor may include a first external termination and a second external termination. A first portion of the first external termination may be spaced apart from a first portion of the second external termination by a first external termination spacing distance. A first active electrode layer may include a rectangular first active electrode connected with the first external termination. A second active electrode layer may include a rectangular second active electrode connected with the second external termination. An outermost active electrode layer closest to an outer surface of the capacitor may be spaced apart from the outer surface by an outermost-active-to-surface distance. A ratio of a capacitor thickness in a Z-direction to the outermost-active-to-surface distance may be 1.1 or more. A ratio of a capacitor length in a longitudinal direction to the first external termination spacing distance may be 15 or more.

公开(公告)号：US20220328248A1

公开(公告)日：2022-10-13

申请号：US17849923

申请日：2022-06-27

Applicant: KYOCERA AVX Components Corporation

Inventor： Marianne Berolini ,  Jeffrey Horn ,  Jeffrey Cain

IPC: H01G4/242 ,  H01G4/232 ,  H01G4/012 ,  H01G4/008 ,  H01L25/18 ,  H01L23/64 ,  H05K1/18

Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.

公开(公告)号：US20240249880A1

公开(公告)日：2024-07-25

申请号：US18408647

申请日：2024-01-10

Applicant: KYOCERA AVX Components Corporation

Inventor： Cory Nelson ,  Jeffrey Horn ,  Marianne Berolini

IPC: H01G4/012 ,  H01G4/30

CPC classification number: H01G4/012 ,  H01G4/30

Abstract: Multilayer capacitors are provided. For example, a multilayer capacitor may include first and second terminals adjacent first and second opposing end surfaces, respectively, and a plurality of active electrode layers, each active electrode layer including a first active electrode electrically connected with the first terminal and a second active electrode electrically connected with the second terminal. The first active electrode may be spaced apart from the second active electrode in a lengthwise direction to form an active electrode end gap. The multilayer capacitor also may include a plurality of floating electrode layers, including topmost and bottommost floating electrode layers. The plurality of active electrode layers may be an odd number such that a topmost active electrode layer is disposed between the topmost floating electrode layer and a top surface and a bottommost active electrode layer is disposed between the bottommost floating electrode layer and a bottom surface.

公开(公告)号：US20250111993A1

公开(公告)日：2025-04-03

申请号：US18725287

申请日：2022-12-28

Applicant: KYOCERA AVX Components Corporation

Inventor： Marianne Berolini ,  Craig Nies ,  Jeffrey Horn ,  Joseph M. Hock

IPC: H01G2/06 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232 ,  H01G4/30

Abstract: The present invention is directed to a surface mount coupling capacitor. The coupling capacitor includes a main body containing at least two sets of alternating dielectric layers and internal electrode layers wherein each set of alternating dielectric layers and internal electrode layers contains a first internal electrode layer and a second internal electrode layer. Each internal electrode layer includes a top edge, a bottom edge opposite the top edge, and two side edges extending between the top edge and the bottom edge that define a main body of the internal electrode layer. The coupling capacitor includes external terminals electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the coupling capacitor and a bottom surface of the coupling capacitor opposing the top surface of the coupling capacitor. The capacitor includes one or more dielectric regions including one or more air voids.