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公开(公告)号：US20250029785A1
公开(公告)日：2025-01-23
申请号：US18907766
申请日：2024-10-07
Applicant: KYOCERA AVX Components Corporation
Inventor： Jeffrey Cain
IPC: H01G4/12 , H01G4/005 , H01G4/012 , H01G4/232 , H01G4/252 , H01G4/30 , H01L23/00 , H05K1/02 , H05K1/18 , H05K3/34
Abstract: The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer. In addition, external terminals are electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the capacitor and a bottom surface of the capacitor opposing the top surface of the capacitor.
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公开(公告)号：US20230368985A1
公开(公告)日：2023-11-16
申请号：US18352406
申请日：2023-07-14
Applicant: KYOCERA AVX Components Corporation
Inventor： Shelby Bartley , Jeffrey Cain , Joseph M. Hock
Abstract: An ultracapacitor module is disclosed. The ultracapacitor module comprises: an enclosure, and a plurality of ultracapacitors housed within the enclosure wherein at least one ultracapacitor of the plurality of ultracapacitors is secured to the enclosure. The ultracapacitor module satisfies one or more of the following conditions upon being subjected to a vibration profile in accordance with ISO 16750-3-2012, Table 12 and IEC 60068-2-64: a capacitance within a rated capacitance value as determined in accordance IEC 62391-1, Method 1A, an equivalent series resistance within a rated equivalent series resistance value as determined in accordance IEC 62391-1, a leakage current within a rated leakage current value as determined in accordance IEC 62391-1, an operating voltage with a rated operating voltage value.
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公开(公告)号：US20230019800A1
公开(公告)日：2023-01-19
申请号：US17859122
申请日：2022-07-07
Applicant: KYOCERA AVX Components Corporation
Inventor： Jeffrey Cain
Abstract: The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a set of alternating dielectric layers and internal electrode layers wherein the set contains a first internal electrode layer and a second internal electrode layer and each internal electrode layer includes a top edge, a bottom edge opposite the top edge, and two side edges extending between the top edge and the bottom edge that define a main body of the internal electrode layer. Each internal electrode layer contains at least one lead tab extending from the top edge of the main body of the internal electrode layer and at least one lead tab extending from the bottom edge of the main body of the internal electrode layer, wherein at least one lead tab extending from the top edge of the main body of the internal electrode layer and at least one lead tab extending from the bottom edge of the main body of the internal electrode layer include a lateral edge aligned with a side edge of the main body of the internal electrode layer. External terminals are electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the capacitor, a bottom surface of the capacitor opposing the top surface of the capacitor, and extending along an end surface between the top surface and the bottom surface.
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公开(公告)号：US12112891B2
公开(公告)日：2024-10-08
申请号：US17890650
申请日：2022-08-18
Applicant: KYOCERA AVX Components Corporation
Inventor： Jeffrey Cain
IPC: H01G4/12 , H01G4/005 , H01G4/012 , H01G4/232 , H01G4/252 , H01G4/30 , H01L23/00 , H05K1/02 , H05K1/18 , H05K3/34
CPC classification number: H01G4/1227 , H01G4/005 , H01G4/012 , H01G4/232 , H01G4/252 , H01G4/30 , H05K1/181 , H01L24/08 , H01L24/16 , H01L2224/08265 , H01L2224/16225 , H01L2924/19041 , H01L2924/19103 , H05K1/0231 , H05K3/3436 , H05K2201/10015 , H05K2201/10515 , H05K2201/1053
Abstract: The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer. In addition, external terminals are electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the capacitor and a bottom surface of the capacitor opposing the top surface of the capacitor.
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公开(公告)号：US11742156B2
公开(公告)日：2023-08-29
申请号：US17510636
申请日：2021-10-26
Applicant: KYOCERA AVX Components Corporation
Inventor： Shelby Bartley , Jeffrey Cain , Joseph M. Hock
Abstract: An ultracapacitor module is disclosed. The ultracapacitor module comprises: an enclosure, and a plurality of ultracapacitors housed within the enclosure wherein at least one ultracapacitor of the plurality of ultracapacitors is secured to the enclosure. The ultracapacitor module satisfies one or more of the following conditions upon being subjected to a vibration profile in accordance with ISO 16750-3-2012, Table 12 and IEC 60068-2-64: a capacitance within a rated capacitance value as determined in accordance IEC 62391-1, Method 1A, an equivalent series resistance within a rated equivalent series resistance value as determined in accordance IEC 62391-1, a leakage current within a rated leakage current value as determined in accordance IEC 62391-1, an operating voltage with a rated operating voltage value.
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Patent Agency Ranking
公开(公告)号：US20220392705A1
公开(公告)日：2022-12-08
申请号：US17890650
申请日：2022-08-18
Applicant: KYOCERA AVX Components Corporation
Inventor： Jeffrey Cain
Abstract: The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer. In addition, external terminals are electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the capacitor and a bottom surface of the capacitor opposing the top surface of the capacitor.
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公开(公告)号：US20220130622A1
公开(公告)日：2022-04-28
申请号：US17510636
申请日：2021-10-26
Applicant: KYOCERA AVX Components Corporation
Inventor： Shelby Bartley , Jeffrey Cain , Joseph M. Hock
Abstract: An ultracapacitor module is disclosed. The ultracapacitor module comprises: an enclosure, and a plurality of ultracapacitors housed within the enclosure wherein at least one ultracapacitor of the plurality of ultracapacitors is secured to the enclosure. The ultracapacitor module satisfies one or more of the following conditions upon being subjected to a vibration profile in accordance with ISO 16750-3-2012, Table 12 and IEC 60068-2-64: a capacitance within a rated capacitance value as determined in accordance IEC 62391-1, Method 1A, an equivalent series resistance within a rated equivalent series resistance value as determined in accordance IEC 62391-1, a leakage current within a rated leakage current value as determined in accordance IEC 62391-1, an operating voltage with a rated operating voltage value.
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公开(公告)号：US20240105394A1
公开(公告)日：2024-03-28
申请号：US18524528
申请日：2023-11-30
Applicant: KYOCERA AVX Components Corporation
Inventor： Jeffrey Cain
CPC classification number: H01G9/15 , H01G9/012 , H01G9/028 , H01G9/0525 , H01G9/08 , H01G2009/05
Abstract: A capacitor that is capable of exhibiting good electrical properties under a wide variety of different conditions is provided. The capacitor contains a capacitor element that includes a sintered porous anode body, a dielectric that overlies the anode body, and a solid electrolyte that overlies the dielectric and includes a conductive polymer. The capacitor also contains multiple exposed anode lead portions that are electrically connected to respective anode terminations and a planar cathode termination that is electrically connected to the solid electrolyte.
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公开(公告)号：US20230026454A1
公开(公告)日：2023-01-26
申请号：US17856086
申请日：2022-07-01
Applicant: KYOCERA AVX Components Corporation
Inventor： Jeffrey Cain , Joseph N. Hock , Shelby Bartley
Abstract: A data center rack is disclosed. The data center rack comprises a plurality of chamber openings including computing devices; and at least one chamber opening including a mounted ultracapacitor module comprising a plurality of ultracapacitors. A data center comprising a data center rack is also disclosed.
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公开(公告)号：US20220328248A1
公开(公告)日：2022-10-13
申请号：US17849923
申请日：2022-06-27
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Jeffrey Horn , Jeffrey Cain
Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.
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