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1.
公开(公告)号:US07500306B2
公开(公告)日:2009-03-10
申请号:US10912257
申请日:2004-08-05
CPC分类号: H05K1/115 , H05K1/0268 , H05K3/4602 , H05K3/4623 , H05K2201/09518 , H05K2201/09536 , H05K2201/096 , H05K2203/162 , Y10T29/49004 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要: A method of forming an electrical structure that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the testes, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
摘要翻译: 一种形成包括复合功率信号(CPS)子结构的电气结构的方法。 形成和测试CPS子结构以确定CPS子结构是否满足电气性能验收要求。 测试包括测试电气短路,电气开路,错误阻抗和电信号延迟。 如果CPS子结构通过睾丸,则在CPS子结构的外表面上形成介电金属(DM)层压体。 DM层压板包括相等数量的N个介电层和金属层的交替序列,使得N个介电层的第一介电层形成在CPS子结构的外表面上。 N至少为2.通过DM层压体形成多层导电通孔,并电耦合到CPS子结构的金属层。
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2.
公开(公告)号:US06810583B2
公开(公告)日:2004-11-02
申请号:US09924204
申请日:2001-08-07
IPC分类号: H01K310
CPC分类号: H05K1/115 , H05K1/0268 , H05K3/4602 , H05K3/4623 , H05K2201/09518 , H05K2201/09536 , H05K2201/096 , H05K2203/162 , Y10T29/49004 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要: An electrical structure that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the tests, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
摘要翻译: 包括复合功率信号(CPS)子结构的电气结构。 形成和测试CPS子结构以确定CPS子结构是否满足电气性能验收要求。 测试包括测试电气短路,电气开路,错误阻抗和电信号延迟。 如果CPS子结构通过测试,则在CPS子结构的外表面上形成介电金属(DM)层压体。 DM层压板包括相等数量的N个介电层和金属层的交替序列,使得N个介电层的第一介电层形成在CPS子结构的外表面上。 N至少为2.通过DM层压体形成多层导电通孔,并电耦合到CPS子结构的金属层。
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3.
公开(公告)号:US20050005439A1
公开(公告)日:2005-01-13
申请号:US10912257
申请日:2004-08-05
申请人: Karen Carpenter , Voya Markovich , David Thomas
发明人: Karen Carpenter , Voya Markovich , David Thomas
CPC分类号: H05K1/115 , H05K1/0268 , H05K3/4602 , H05K3/4623 , H05K2201/09518 , H05K2201/09536 , H05K2201/096 , H05K2203/162 , Y10T29/49004 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要: An electrical structure, and associated method of formation, that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the tests, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
摘要翻译: 电气结构和相关的形成方法,其包括复合功率信号(CPS)子结构。 形成和测试CPS子结构以确定CPS子结构是否满足电气性能验收要求。 测试包括测试电气短路,电气开路,错误阻抗和电信号延迟。 如果CPS子结构通过测试,则在CPS子结构的外表面上形成介电金属(DM)层压体。 DM层压板包括相等数量的N个介电层和金属层的交替序列,使得N个介电层的第一介电层形成在CPS子结构的外表面上。 N至少为2.通过DM层压体形成多层导电通孔,并电耦合到CPS子结构的金属层。
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