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公开(公告)号：US07169682B2
公开(公告)日：2007-01-30
申请号：US11041981
申请日：2005-01-26
IPC分类号： H01L21/76 , H01L21/4763
CPC分类号： H01L21/76232 , H01L21/823481
摘要： A method for manufacturing a semiconductor device comprising: a first step of successively forming a silicon oxide film and a silicon nitride film on a silicon substrate, followed by forming a silicon nitride oxide film or a multilayered film containing the silicon nitride oxide film on the silicon nitride film; a second step of forming a photoresist film having an opening portion located at the position corresponding to an element isolation area of the silicon substrate on the silicon nitride film or the multilayered film according to a photolithography method; a third step of forming a trench having a pair of tapered side surface portions on the confronting side surfaces thereof on the silicon nitride oxide film or the multilayered film by using the photoresist film as a mask, the tapered side surface portions being inclined toward the substrate side so as to approach each other; and a fourth step of patterning the silicon nitride film and the silicon oxide film by dry etching by using the photoresist film and the silicon nitride oxide film or the multilayered film as a mask.
摘要翻译： 一种制造半导体器件的方法，包括：在硅衬底上依次形成氧化硅膜和氮化硅膜的第一步骤，然后在硅上形成氮氧化硅膜或含有氮氧化硅膜的多层膜 氮化膜; 根据光刻法在氮化硅膜或多层膜上形成具有位于对应于硅衬底的元件隔离区域的位置的开口部分的光致抗蚀剂膜的第二步骤; 第三步骤，通过使用光致抗蚀剂膜作为掩模，在氮化硅膜或多层膜上形成具有一对锥形侧面部分的沟槽，该锥形侧表面部分在其相对的侧表面上朝向衬底倾斜 以便彼此接近; 以及通过使用光致抗蚀剂膜和氮氧化硅膜或多层膜作为掩模通过干蚀刻图案化氮化硅膜和氧化硅膜的第四步骤。
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公开(公告)号：US20050170607A1
公开(公告)日：2005-08-04
申请号：US11041981
申请日：2005-01-26
IPC分类号： H01L21/3065 , H01L21/76 , H01L21/762 , H01L21/8234
CPC分类号： H01L21/76232 , H01L21/823481
摘要： A method for manufacturing a semiconductor device comprising: a first step of successively forming a silicon oxide film and a silicon nitride film on a silicon substrate, followed by forming a silicon nitride oxide film or a multilayered film containing the silicon nitride oxide film on the silicon nitride film; a second step of forming a photoresist film having an opening portion located at the position corresponding to an element isolation area of the silicon substrate on the silicon nitride film or the multilayered film according to a photolithography method; a third step of forming a trench having a pair of tapered side surface portions on the confronting side surfaces thereof on the silicon nitride oxide film or the multilayered film by using the photoresist film as a mask, the tapered side surface portions being inclined toward the substrate side so as to approach each other; and a fourth step of patterning the silicon nitride film and the silicon oxide film by dry etching by using the photoresist film and the silicon nitride oxide film or the multilayered film as a mask.
摘要翻译： 一种制造半导体器件的方法，包括：在硅衬底上依次形成氧化硅膜和氮化硅膜的第一步骤，然后在硅上形成氮氧化硅膜或含有氮氧化硅膜的多层膜 氮化膜; 根据光刻法在氮化硅膜或多层膜上形成具有位于对应于硅衬底的元件隔离区域的位置的开口部分的光致抗蚀剂膜的第二步骤; 第三步骤，通过使用光致抗蚀剂膜作为掩模，在氮化硅膜或多层膜上形成具有一对锥形侧面部分的沟槽，该锥形侧表面部分在其相对的侧表面上朝向衬底倾斜 以便彼此接近; 以及通过使用光致抗蚀剂膜和氮氧化硅膜或多层膜作为掩模通过干蚀刻图案化氮化硅膜和氧化硅膜的第四步骤。
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公开(公告)号：US20050085086A1
公开(公告)日：2005-04-21
申请号：US10688873
申请日：2003-10-21
申请人： Hideyuki Kanzawa
发明人： Hideyuki Kanzawa
IPC分类号： H01L21/3065 , H01L21/302 , H01L21/311 , H01L21/461 , H01L21/768
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/76802 , H01L21/76804
摘要： A semiconductor device has anisotropically formed via holes through a PMD layer. The anisotropic geometry of the via holes results in the diameter of a via hole over a gate structure being equal to the diameter of a via hole not over the gate structure. The via holes are formed by depositing a silicon layer and an antireflective layer over the PMD layer. The silicon layer and the antireflective layer are etched to have holes with a regular taper. The holes through the PMD are anisotropically etched so as to have straight walls.
摘要翻译： 半导体器件具有通过PMD层的各向异性形成的通孔。 通孔的各向异性几何形状导致栅极结构上的通孔的直径等于不在栅极结构上的通孔的直径。 通孔在PMD层上沉积硅层和抗反射层形成。 蚀刻硅层和抗反射层以形成具有规则锥度的孔。 通过PMD的孔各向异性地蚀刻以具有直壁。
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公开(公告)号：US07122903B2
公开(公告)日：2006-10-17
申请号：US10688873
申请日：2003-10-21
申请人： Hideyuki Kanzawa
发明人： Hideyuki Kanzawa
IPC分类号： H01L29/40
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/76802 , H01L21/76804
摘要： A semiconductor device has anisotropically formed via holes through a PMD layer. The anisotropic geometry of the via holes results in the diameter of a via hole over a gate structure being equal to the diameter of a via hole not over the gate structure. The via holes are formed by depositing a silicon layer and an antireflective layer over the PMD layer. The silicon layer and the antireflective layer are etched to have holes with a regular taper. The holes through the PMD are anisotropically etched so as to have straight walls.
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公开(公告)号：US20060091431A1
公开(公告)日：2006-05-04
申请号：US11297340
申请日：2005-12-09
申请人： Hideyuki Kanzawa
发明人： Hideyuki Kanzawa
IPC分类号： H01L29/80
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/76802 , H01L21/76804
摘要： A semiconductor device has anisotropically formed via holes through a PMD layer. The anisotropic geometry of the via holes results in the diameter of a via hole over a gate structure being equal to the diameter of a via hole not over the gate structure. The via holes are formed by depositing a silicon layer and an antireflective layer over the PMD layer. The silicon layer and the antireflective layer are etched to have holes with a regular taper. The holes through the PMD are anisotropically etched so as to have straight walls.
摘要翻译： 半导体器件具有通过PMD层的各向异性形成的通孔。 通孔的各向异性几何形状导致栅极结构上的通孔的直径等于不在栅极结构上的通孔的直径。 通孔在PMD层上沉积硅层和抗反射层形成。 蚀刻硅层和抗反射层以形成具有规则锥度的孔。 通过PMD的孔各向异性地蚀刻以具有直壁。
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公开(公告)号：US07410897B2
公开(公告)日：2008-08-12
申请号：US11297340
申请日：2005-12-09
申请人： Hideyuki Kanzawa
发明人： Hideyuki Kanzawa
IPC分类号： H01L21/00 , H01L21/44 , H01L21/302 , H01L21/461
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/76802 , H01L21/76804
摘要： A semiconductor device has anisotropically formed via holes through a PMD layer. The anisotropic geometry of the via holes results in the diameter of a via hole over a gate structure being equal to the diameter of a via hole not over the gate structure. The via holes are formed by depositing a silicon layer and an antireflective layer over the PMD layer. The silicon layer and the antireflective layer are etched to have holes with a regular taper. The holes through the PMD are anisotropically etched so as to have straight walls.
摘要翻译： 半导体器件具有通过PMD层的各向异性形成的通孔。 通孔的各向异性几何形状导致栅极结构上的通孔的直径等于不在栅极结构上的通孔的直径。 通孔在PMD层上沉积硅层和抗反射层形成。 蚀刻硅层和抗反射层以形成具有规则锥度的孔。 通过PMD的孔各向异性地蚀刻以具有直壁。
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