公开(公告)号：US20120054697A1

公开(公告)日：2012-03-01

申请号：US13222016

申请日：2011-08-31

申请人： Kazuhiro TAKAHATA ,  Tetsuaki MATSUNAWA ,  Masahiro MIYAIRI ,  Shimon MAEDA ,  Shigeki NOJIMA

发明人： Kazuhiro TAKAHATA ,  Tetsuaki MATSUNAWA ,  Masahiro MIYAIRI ,  Shimon MAEDA ,  Shigeki NOJIMA

IPC分类号： G06F17/50

CPC分类号： G03F7/70125

摘要： According to one embodiment, a light source shape calculation method includes calculating a first light source shape as an exposure illumination light source shape, so that the first light source shape has a light source shape region symmetrical to an X-axis direction and a Y-axis direction, and a process margin when forming an on-substrate pattern corresponding to at least two pattern layouts defined by design rules is optimized. A point light source is calculated such that the process margin of formation of the on-substrate pattern corresponding to a pattern layout to be formed on a semiconductor device is optimized, and is applied to the first light source shape.

摘要翻译： 根据一个实施例，光源形状计算方法包括计算作为曝光照明光源形状的第一光源形状，使得第一光源形状具有与X轴方向对称的光源形状区域和Y轴方向， 并且当形成与由设计规则定义的至少两个图案布局相对应的基板上图案时的处理余量被优化。 计算点光源，使得对应于要形成在半导体器件上的图案布局的衬底上图案的形成工艺余量优化，并应用于第一光源形状。

公开(公告)号：US20100153905A1

公开(公告)日：2010-06-17

申请号：US12630643

申请日：2009-12-03

申请人： Shimon MAEDA

发明人： Shimon MAEDA

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G03F1/00 ,  G03F1/26 ,  G03F1/70

摘要： A graph is created in which mask patterns adjacent to one another at a distance in which desired printing resolution cannot be obtained in a lithography process among mask patterns generated based on a pattern layout design drawing are set as nodes connected to one another by edges. An odd number loop formed by an odd number of nodes is selected from closed loops. When the selected odd number loop is not isolated, based on whether a closed loop group in which a plurality of closed loops including the odd number loop are connected includes an even number loop formed by an even number of nodes, rearrangement target nodes are selected from the odd number loop included in the closed loop group according to different selection references. The layout of patterns described in the pattern layout design drawing is rearranged corresponding to the selected rearrangement target nodes.

摘要翻译： 创建图形，其中以基于图案布局设计图形生成的掩模图案之间的光刻处理中在距离不相等的距离处彼此相邻的掩模图案被设置为通过边缘彼此连接的节点。 从闭环中选择由奇数个节点形成的奇数循环。 当所选择的奇数循环不被隔离时，基于其中包括奇数循环的多个闭环的闭环组是否包括由偶数个节点形成的偶数循环，重排目标节点从 根据不同的选择参考，包括在闭环组中的奇数循环。 在图案布局设计图中描述的图案的布局对应于所选择的重排目标节点重新排列。

公开(公告)号：US20100062549A1

公开(公告)日：2010-03-11

申请号：US12549209

申请日：2009-08-27

申请人： Shimon MAEDA

发明人： Shimon MAEDA

IPC分类号： H01L21/66 ,  G06F17/50

CPC分类号： G03F1/36

摘要： A side of a correction target pattern is divided into a plurality of segments. A space between each of the divided segments or an imaginary segment extended from both the ends of the segment to outer sides and a side of an adjacent pattern adjacent to the segment is measured. An overlapping distance between each of the divided segments or the imaginary segment extended from both the ends of the segment to the outer sides and the side of the adjacent pattern is measured. A shift amount of the segment is corrected based on the overlapping distance.

摘要翻译： 校正目标图案的一侧被分成多个段。 测量每个分割段之间的间隔或从段到外侧的两端延伸的虚拟段和与段相邻的相邻图案的一侧。 测量每个分割段或从段的两端延伸到外侧和相邻图案侧的虚拟段之间的重叠距离。 基于重叠距离来校正段的移位量。

公开(公告)号：US20090293038A1

公开(公告)日：2009-11-26

申请号：US12470334

申请日：2009-05-21

申请人： Shimon MAEDA ,  Suigen KYOH ,  Satoshi TANAKA

发明人： Shimon MAEDA ,  Suigen KYOH ,  Satoshi TANAKA

IPC分类号： G06F17/50

CPC分类号： G03F1/36

摘要： A process proximity effect (PPE) correction method includes providing corrected cells arranged in a place/route arrangement, the corrected cells being obtained by correcting design data of a semiconductor device based on correction value for correcting PPE correction, determining whether a cell arrangement of the corrected cells is registered or not based on environmental profiles, conducting lithography verification if the corrected cells includes the cell arrangement not registered in the environmental profiles, the verification being performed on the corrected cells, wherein the corrected cell to be conducted the verification corresponds to the cell arrangement not registered, determining whether error is found or not in the verification, correcting the corrected cell to which the verification is conducted if the error is found and registering the cell arrangement in the environmental profiles, and registering the cell arrangement of the corrected cell if the error is not found.

摘要翻译： 过程接近效应（PPE）校正方法包括提供以位置/路线布置布置的校正单元，校正单元是通过基于用于校正PPE校正的校正值校正半导体器件的设计数据而获得的， 校正单元是否基于环境简档进行登记，如果校正单元包括没有注册在环境简档中的单元布置，则对校正单元执行验证，其中要进行验证的校正单元对应于 单元布置未注册，确定验证中是否存在错误，如果发现错误，则校正进行验证的修正单元，并将该单元布置注册到环境配置文件中，以及登记修正单元的单元布置 如果没有找到错误。

公开(公告)号：US20110177457A1

公开(公告)日：2011-07-21

申请号：US12984190

申请日：2011-01-04

申请人： Shimon MAEDA ,  Norikazu Ooishi ,  Sachiko Kobayashi

发明人： Shimon MAEDA ,  Norikazu Ooishi ,  Sachiko Kobayashi

IPC分类号： G03F7/20 ,  G06F17/50

CPC分类号： G03F1/36

摘要： According to the embodiment, a pattern after lithography is derived by using a mask pattern. The mask pattern is corrected by moving a first moving target pattern so that a first evaluation value calculated with respect to this pattern after lithography satisfies a first condition. Next, a pattern after lithography is derived by using the mask pattern after correction. The mask pattern after correction is further corrected by moving a second moving target pattern so that a second evaluation value calculated with respect to this pattern after lithography satisfies a second condition.

摘要翻译： 根据实施例，通过使用掩模图案导出光刻之后的图案。 通过移动第一移动目标图案来校正掩模图案，使得在光刻之后相对于该图案计算的第一评估值满足第一条件。 接下来，通过在校正后使用掩模图案导出光刻之后的图案。 校正后的掩模图案通过移动第二移动目标图案进一步校正，使得在光刻之后相对于该图案计算的第二评估值满足第二条件。

公开(公告)号：US20090187590A1

公开(公告)日：2009-07-23

申请号：US12354594

申请日：2009-01-15

申请人： Shimon MAEDA ,  Noriyuki Honda

发明人： Shimon MAEDA ,  Noriyuki Honda

IPC分类号： G06F7/00 ,  G11C8/00 ,  G06F12/00

CPC分类号： G06F17/5045

摘要： A database creation method relating to semiconductor ICs, the database registering function block cells constituting a design data of semiconductor IC and evaluation values corresponding to the function block cells such that the function block cells are associated with the evaluation values, for each of the semiconductor ICs, the creation method includes judging whether or not that function block cells constituting a design data of desired semiconductor IC include an unregistered function block cell which is not registered in the database, calculating an unregistered evaluation value corresponding to the unregistered function block cell when the function block cells constituting the design data of the desired semiconductor IC are judged to include the unregistered function block cell, and updating the database by registering the unregistered function block cell and the unregistered evaluation value such that the unregistered function block cell is associated with the unregistered evaluation value.

摘要翻译： 关于半导体IC的数据库创建方法，构成半导体IC的设计数据的数据库登记功能块单元和与功能块单元相对应的评估值，使得功能块单元与评估值相关联，用于每个半导体IC 所述创建方法包括判断构成所需半导体IC的设计数据的功能块单元是否包括未登记在数据库中的未注册功能块单元，计算与未注册功能块单元相对应的未注册评估值， 判断构成期望的半导体IC的设计数据的块单元包括未注册的功能块单元，并且通过注册未注册的功能块单元和未注册的评估值来更新数据库，使得未注册的功能块单元与未注册的评估相关联 价值。

公开(公告)号：US20140073141A1

公开(公告)日：2014-03-13

申请号：US13728495

申请日：2012-12-27

申请人： Shimon MAEDA ,  Kenji Konomi

发明人： Shimon MAEDA ,  Kenji Konomi

IPC分类号： H01L21/02

CPC分类号： H01L21/02318 ,  B81C1/00031 ,  B81C2201/0149 ,  H01L21/0271 ,  H01L21/32139

摘要： In a method for forming a pattern according to an embodiment, a first guide pattern and a second guide pattern for induced self organization of a DSA material are formed on substrate. On a first DSA condition, a first phase-separated pattern having regularity with respect to the first guide pattern is formed, and a first pattern is formed by processing the lower layer side. Subsequently, on a second DSA condition, a second phase-separated pattern having regularity with respect to the second guide pattern is formed, and a second pattern is formed by processing the lower layer side.

摘要翻译： 在根据实施例的形成图案的方法中，在基底上形成用于DSA材料的诱导自组织的第一引导图案和第二引导图案。 在第一DSA条件下，形成相对于第一引导图案具有规则性的第一相分离图案，并且通过处理下层侧形成第一图案。 随后，在第二DSA条件下，形成相对于第二引导图案具有规则性的第二相分离图案，并且通过处理下层侧形成第二图案。

公开(公告)号：US20090044167A1

公开(公告)日：2009-02-12

申请号：US12186244

申请日：2008-08-05

申请人： Shimon MAEDA

发明人： Shimon MAEDA

IPC分类号： G06F17/50

CPC分类号： G03F1/36 ,  G06F17/5068 ,  G06F2217/12 ,  Y02P90/265

摘要： A process-model generation method according to an embodiment of the present invention comprises: forming a test pattern on a film to be processed by exposing a test mask having a mask pattern formed thereon; generating a plurality of process models having a different model parameter; performing a simulation of the mask pattern by using each of the process models to predict a plurality of model patterns; calculating a difference in dimension between the test pattern and each of the model patterns; extracting a model pattern in which the difference in dimension from the test pattern is within a scope of specification from the model patterns; and specifying the process model, which predicts the extracted model pattern, as the mask pattern.

摘要翻译： 根据本发明的实施例的工艺模型生成方法包括：通过使形成在其上的掩模图案的测试掩模曝光来在要处理的膜上形成测试图案; 产生具有不同模型参数的多个过程模型; 通过使用每个过程模型来执行掩模图案的模拟以预测多个模型模式; 计算测试图案与每个模型图案之间的尺寸差异; 提取其中尺寸与测试图案的差异在模型范围内的模型模式; 并指定将所提取的模型模式预测为过程模型作为掩模图案。