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    Audio signal data processing system
    1.
    发明授权
    Audio signal data processing system 失效
    音频信号数据处理系统

    公开(公告)号：US5065433A

    公开(公告)日：1991-11-12

    申请号：US476949

    申请日：1990-02-08

    申请人： Kazunaga Ida ,  Tatsushi Iizuka ,  Makio Yamaki ,  Hiroyuki Ishihara ,  Yukio Matsumoto ,  Kazuhiro Hayashi

    发明人： Kazunaga Ida ,  Tatsushi Iizuka ,  Makio Yamaki ,  Hiroyuki Ishihara ,  Yukio Matsumoto ,  Kazuhiro Hayashi

    IPC分类号： G06F17/10

    CPC分类号： G06F17/10 ,  Y10S84/26

    摘要： An audio signal data processing system comprises an input device sequentially supplying incoming audio signal data, a data memory control device writing and reading-out the audio signal data into and from a data memory, a delay memory control device sequentially reading-out the audio signal data from the data memory and storing the data into a delay memory and sequentially reading-out the audio signal data from the delay memory and writing the data into the data memory, an arithmetic device multiplying predetermined coefficient data by the audio signal data having been read-out by the delay memory control device and written into the data memory and summing up results of the multiplication. The arithmetic device includes a plurality of multiplication and summing devices multiplying coefficient data by the audio signal data for each of data groups which are obtained by grouping a predetermined number of the audio signal data read-out by the reading device sequentially in the order of reading and subsequently summing up the multiplied values, and a filter device for executing a filter characteristic operation for calculated values respectively obtained by each of the multiplying and summing device, wherein a filter characteristic of the filtering device is made adjustable.

    Audio signal data processing system
    2.
    发明授权
    Audio signal data processing system 失效
    音频信号数据处理系统

    公开(公告)号：US5091951A

    公开(公告)日：1992-02-25

    申请号：US486866

    申请日：1990-03-01

    申请人： Kazunaga Ida ,  Makio Yamaki ,  Yukio Matsumoto ,  Hiroyuki Ishihara ,  Toshiyuki Naoe ,  Hideyuki Terauchi

    发明人： Kazunaga Ida ,  Makio Yamaki ,  Yukio Matsumoto ,  Hiroyuki Ishihara ,  Toshiyuki Naoe ,  Hideyuki Terauchi

    IPC分类号： G06F17/10

    CPC分类号： G06F17/10

    摘要： An audio signal data processing system includes first and second processing devices for processing audio signal data, the first and second processing device having input and output ports of at least two channels, and a control device for controlling the operation of the first and second processing device. The input audio signal data is supplied to the input port of one channel of each of the first and second processing devices, and output data from the output port of said one channel of said first processing device is supplied to the input port of the other channel of the second processing device, and output audio signl data are obtained at each output port of both channels of the second processing device. With this arrangement, one of the cascade processing and the parallel processing can be selectively performed without using a change-over switch provided outside the system.

    Digital signal processing device and audio apparatus using the same
    3.
    发明授权
    Digital signal processing device and audio apparatus using the same 失效
    数字信号处理装置和使用其的音频装置

    公开(公告)号：US5255323A

    公开(公告)日：1993-10-19

    申请号：US880302

    申请日：1992-05-05

    申请人： Hiroyuki Ishihara ,  Kazunaga Ida ,  Kazuo Watanabe ,  Soichi Toyama ,  Makio Yamaki

    发明人： Hiroyuki Ishihara ,  Kazunaga Ida ,  Kazuo Watanabe ,  Soichi Toyama ,  Makio Yamaki

    IPC分类号： G01R23/16 ,  H03G3/00 ,  H03G5/00

    CPC分类号： G01R23/16 ,  H03G3/002 ,  H03G5/005

    摘要： A digital signal processing device for outputting a holding data in an output register from a DSP in synchronism with a second clock pulse having a frequency lower than that of a first clock pulse for conducting arithmetic processing in the DSP. Accordingly, data to be output from the DSP can be directly read by a microcomputer, and contents in a coefficient memory and a delay time memory, for example, can be updated in accordance with the read data. Further, the digital signal processing device can be applied to an audio apparatus such as a loudness controller and a spectrum indicating apparatus.

    摘要翻译： 一种数字信号处理装置，用于与具有低于第一时钟脉冲的频率的第二时钟脉冲同步地从DSP输出输出寄存器中的保持数据，以进行DSP中的算术处理。 因此，可以由微处理器直接读取从DSP输出的数据，例如可以根据读取的数据更新系数存储器和延迟时间存储器中的内容。 此外，数字信号处理装置可以应用于诸如响度控制器和频谱指示装置的音频装置。

    Sound system with howling-prevention function
    4.
    发明授权
    Sound system with howling-prevention function 失效
    音响系统具有防啸叫功能

    公开(公告)号：US5307417A

    公开(公告)日：1994-04-26

    申请号：US999544

    申请日：1992-12-31

    申请人： Yoshinobu Takamura ,  Kazunaga Ida ,  Fumio Matsushita

    发明人： Yoshinobu Takamura ,  Kazunaga Ida ,  Fumio Matsushita

    IPC分类号： H03F3/181 ,  H03H17/02 ,  H03H17/04 ,  H03H17/08 ,  H04R3/02 ,  H04R27/00

    CPC分类号： H04R3/02

    摘要： A sound system with a howling-prevention function comprises an all-pass filter having group delay characteristics, which vary with the elapse of time, provided on a line used for the transmission of an audio signal from a microphone. Owing to the provision of such a sound system, any deterioration in the sound quality with respect to high frequencies and a chorus phenomenon is not produced, thereby making it possible to prevent howling without causing inferior sound quality.

    摘要翻译： 具有防啸叫功能的声音系统包括具有组延迟特性的全通滤波器，其随着时间的流逝而变化，提供在用于传输来自麦克风的音频信号的线上。 由于提供这样的音响系统，不会产生声音质量相对于高频和合唱现象的恶化，从而可以防止啸声而不会导致劣质音质。

    Pulse width distortion correction circuit
    9.
    发明授权
    Pulse width distortion correction circuit 失效
    脉宽失真校正电路

    公开(公告)号：US4881041A

    公开(公告)日：1989-11-14

    申请号：US192984

    申请日：1988-05-12

    申请人： Yoshihiro Kawanabe ,  Kazunaga Ida

    发明人： Yoshihiro Kawanabe ,  Kazunaga Ida

    IPC分类号： H03K5/04 ,  H03K3/017 ,  H03K5/08 ,  H03K5/156 ,  H04L25/03 ,  H04L25/24

    CPC分类号： H03K3/017 ,  H03K5/1565 ,  H04L25/242

    摘要： A pulse width distortion correction circuit in which a digital input signal has its leading and trailing edges smoothed, is added to an analog pulse width control signal and compared to a reference voltage to provide a digital output signal with a corrected duty ratio. A duty ratio detection circuit detects the duty ratio of the digital output signal and provides the corresponding pulse width control signal so as to cause the duty ratio to assume a value of 50%.

    摘要翻译： 将数字输入信号的前沿和后沿平滑化的脉宽失真校正电路加到模拟脉冲宽度控制信号上，并与参考电压进行比较，以提供具有校正占空比的数字输出信号。 占空比检测电路检测数字输出信号的占空比，并提供对应的脉冲宽度控制信号，以使占空比为50％的值。