Semiconductor integrated circuit device
    1.
    发明申请
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号:US20050146961A1

    公开(公告)日:2005-07-07

    申请号:US11042172

    申请日:2005-01-26

    摘要: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.

    摘要翻译: 现有的已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区的衬底进行电接触,这将导致 不对称性导致了微图案化困难的问题的发生。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分为两部分,它们设置在N型阱区NW 1的相对侧,并形成为 形成晶体管的扩散层没有曲率,同时使得布局方向在平行于边界线和位线的方向上运行。 在阵列的中间位置处,以与字线平行的方式形成用于向基板供电的区域,以每组三十二个存储单元行或六十四个单元行提供一个区域。

    SRAM cells with two P-well structure
    2.
    发明授权
    SRAM cells with two P-well structure 有权
    具有两个P阱结构的SRAM单元

    公开(公告)号:US06677649B2

    公开(公告)日:2004-01-13

    申请号:US09565535

    申请日:2000-05-05

    IPC分类号: H01L2976

    摘要: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.

    摘要翻译: 现有的已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区的衬底进行电接触,这将导致 不对称性导致了微图案化困难的问题的发生。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分成两部分,它们设置在N型阱区NW1的相对侧上,并形成为扩散 形成晶体管的层没有曲率,同时使得布局方向在平行于阱边界线和位线的方向上运行。 在阵列的中间位置处,以与字线平行的方式形成用于向基板供电的区域,以每组三十二个存储单元行或六十四个单元行提供一个区域。

    Semiconductor integrated circuit device

    公开(公告)号:US07612417B2

    公开(公告)日:2009-11-03

    申请号:US11042172

    申请日:2005-01-26

    IPC分类号: H01L29/76 H01L27/11

    摘要: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.

    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    4.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路设备

    公开(公告)号:US20090116282A1

    公开(公告)日:2009-05-07

    申请号:US12348524

    申请日:2009-01-05

    IPC分类号: G11C11/40

    摘要: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.

    摘要翻译: 现有的已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区的衬底进行电接触,这将导致 不对称性导致了微图案化困难的问题的发生。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分成两部分,它们设置在N型阱区NW1的相对侧上,并形成为扩散 形成晶体管的层没有曲率,同时使得布局方向在平行于阱边界线和位线的方向上运行。 在阵列的中间位置处,以与字线平行的方式形成用于向基板供电的区域,以每组三十二个存储单元行或六十四个单元行提供一个区域。

    Semiconductor integrated circuit device including SRAM memory cells having two P-channel MOS transistors and four N-channel MOS transistors and with four wiring layers serving as their gate electrodes
    5.
    发明授权
    Semiconductor integrated circuit device including SRAM memory cells having two P-channel MOS transistors and four N-channel MOS transistors and with four wiring layers serving as their gate electrodes 有权
    半导体集成电路器件包括具有两个P沟道MOS晶体管和四个N沟道MOS晶体管以及四个布线层作为其栅电极的SRAM存储单元

    公开(公告)号:US08482083B2

    公开(公告)日:2013-07-09

    申请号:US12821329

    申请日:2010-06-23

    IPC分类号: H01L29/76 H01L27/11

    摘要: Prior known static random access memory (SRAM) cells required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supply power to the substrate are formed in parallel to word lines in such a manner that one region is provided per group of thirty two memory cell rows or sixty four cell rows.

    摘要翻译: 现有已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区的衬底电接触,这将导致不对称性的降低 导致出现微图案化困难的问题。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分成两部分,它们设置在N型阱区NW1的相对侧上,并形成为扩散 形成晶体管的层没有曲率,同时使得布局方向在平行于阱边界线和位线的方向上运行。 在阵列的中间位置处,用于向衬底供电的区域形成为平行于字线,以这样的方式,每组三十二个存储单元行或六十六个单元行提供一个区域。

    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    6.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路设备

    公开(公告)号:US20130049131A1

    公开(公告)日:2013-02-28

    申请号:US13616435

    申请日:2012-09-14

    IPC分类号: H01L27/092

    摘要: Prior known static random access memory (SRAM) cells required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supply power to the substrate are formed in parallel to word lines.

    摘要翻译: 现有已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区域的衬底电接触,这将导致不对称性的降低 导致微图案化困难。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分成两部分,它们设置在N型阱区NW1的相对侧上,并形成为扩散 形成晶体管的层没有曲率,同时使得布局方向在平行于阱边界线和位线的方向上运行。 在阵列的中间位置处,与基板平行地形成用于向基板供电的区域。

    Semiconductor integrated circuit device
    7.
    发明授权
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号:US07781846B2

    公开(公告)日:2010-08-24

    申请号:US12348524

    申请日:2009-01-05

    IPC分类号: H01L29/76 H01L27/11

    摘要: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.

    摘要翻译: 现有的已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区的衬底进行电接触,这将导致 不对称性导致了微图案化困难的问题的发生。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分成两部分,它们设置在N型阱区NW1的相对侧上,并形成为扩散 形成晶体管的层没有曲率,同时使得布局方向在平行于阱边界线和位线的方向上运行。 在阵列的中间位置处,以与字线平行的方式形成用于向基板供电的区域,以每组三十二个存储单元行或六十四个单元行提供一个区域。

    Semiconductor integrated circuit device
    8.
    发明申请
    Semiconductor integrated circuit device 审中-公开
    半导体集成电路器件

    公开(公告)号:US20060050588A1

    公开(公告)日:2006-03-09

    申请号:US11261764

    申请日:2005-10-31

    IPC分类号: G11C7/00

    摘要: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micropatterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.

    摘要翻译: 现有的已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区的衬底进行电接触,这将导致 不对称性导致了对微图案化困难的问题的发生。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分成两部分,它们设置在N型阱区NW1的相对侧上,并形成为扩散 形成晶体管的层没有曲率,同时使得布局方向在平行于阱边界线和位线的方向上运行。 在阵列的中间位置处,以与字线平行的方式形成用于向基板供电的区域,以每组三十二个存储单元行或六十四个单元行提供一个区域。

    Semiconductor integrated circuit device including SRAM cell array and a wiring layer for supplying voltage to well regions of SRAM cells provided on a region exterior of SRAM cell array
    9.
    发明授权
    Semiconductor integrated circuit device including SRAM cell array and a wiring layer for supplying voltage to well regions of SRAM cells provided on a region exterior of SRAM cell array 有权
    包括SRAM单元阵列的半导体集成电路器件和用于向SRAM单元阵列的外部区域上提供的SRAM单元的阱区域提供电压的布线层

    公开(公告)号:US09286968B2

    公开(公告)日:2016-03-15

    申请号:US13616435

    申请日:2012-09-14

    摘要: Prior known static random access memory (SRAM) cells required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supply power to the substrate are formed in parallel to word lines.

    摘要翻译: 现有已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区的衬底电接触,这将导致不对称性的降低 导致微图案化困难。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分成两部分,它们设置在N型阱区NW1的相对侧上,并形成为扩散 形成晶体管的层没有曲率,同时使得布局方向在平行于阱边界线和位线的方向上运行。 在阵列的中间位置处,与基板平行地形成用于向基板供电的区域。

    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    10.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路设备

    公开(公告)号:US20100301422A1

    公开(公告)日:2010-12-02

    申请号:US12821329

    申请日:2010-06-23

    IPC分类号: H01L27/11

    摘要: Prior known static random access memory (SRAM) cells required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supply power to the substrate are formed in parallel to word lines in such a manner that one region is provided per group of thirty two memory cell rows or sixty four cell rows.

    摘要翻译: 现有已知的静态随机存取存储器(SRAM)单元需要将扩散层弯曲成键状形状,以便与其中形成有P型阱区的衬底电接触,这将导致不对称性的降低 导致出现微图案化困难的问题。 为了避免这个问题,构成SRAM单元的逆变器的P型阱区被细分成两部分,它们设置在N型阱区NW1的相对侧上,并形成为扩散 形成晶体管的层没有曲率,同时使得布局方向在平行于阱边界线和位线的方向上运行。 在阵列的中间位置处,用于向衬底供电的区域形成为平行于字线,以这样的方式,每组三十二个存储单元行或六十六个单元行提供一个区域。