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公开(公告)号：US5483246A
公开(公告)日：1996-01-09
申请号：US317057
申请日：1994-10-03
CPC分类号： H01Q13/206 , H01Q1/36
摘要： An omnidirectional antenna (100) includes a resonator (102) and a ground plane (104). The resonator (102) includes a dielectric substrate (402) having a top conductive plate (404) and a bottom conductive plate (406), wherein the top conductive plate (404) is shorted to the bottom conductive plate (406) proximal to a first end (436) and open at a second end (438) of the dielectric substrate (402), a resonator feed (416) having a location between the first (436) and second (438) ends, a first resonator ground (424) and a second resonator ground (408) coupled between the bottom conductive plate (406) and the ground plane (104), the first resonator ground (424) being contiguous to the bottom conductive plate (406) and having a location which is distal to the first end (436) for suppressing undesirable resonator resonance, and the second resonator ground (408) being contiguous to the bottom conductive plate (406) and having a location which is proximal to the first end (436) for controlling a radiation pattern of the resonator (102) to produce a substantially omnidirectional antenna beam pattern.
摘要翻译： 全向天线（100）包括谐振器（102）和接地平面（104）。 谐振器（102）包括具有顶部导电板（404）和底部导电板（406）的电介质基板（402），其中顶部导电板（404）与靠近一个导电板（404）的底部导电板（406）短路 第一端（436）并且在电介质基板（402）的第二端（438）处开放，具有在第一（436）和第二（438）端之间的位置的谐振器馈电（416），第一谐振器接地（424 ）和耦合在所述底部导电板（406）和所述接地平面（104）之间的第二谐振器接地（408），所述第一谐振器接地（424）与所述底部导电板（406）邻接并且具有远端的位置 到第一端（436），用于抑制不期望的谐振器谐振，并且第二谐振器接地（408）邻近底部导电板（406）并且具有靠近第一端（436）的位置，用于控制辐射图 的谐振器（102）以产生基本上全向的 天线波束图案。
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公开(公告)号：US20110121910A1
公开(公告)日：2011-05-26
申请号：US12623097
申请日：2009-11-20
申请人： Bo Yang , Harish S. Muthali , Kenneth C. Barnett
发明人： Bo Yang , Harish S. Muthali , Kenneth C. Barnett
IPC分类号： H03L7/099
CPC分类号： H03L1/023 , H03L2207/05 , H03L2207/06
摘要： A phase locked loop apparatus includes an oscillator, a variable capacitance device, a selectable capacitance device, and a capacitance controller that is configured to provide a control signal to the selectable capacitance device. The selectable capacitance device is connected to the oscillator and is responsive to the control signal such that the selectable capacitance device has a first capacitance at a first control signal value and a second capacitance at a second control signal value. The capacitance controller only selects either the first capacitance or the second capacitance by providing a control signal that has the first control signal value to select the first capacitance and having the second control signal value to select the second capacitance.
摘要翻译： 锁相环装置包括振荡器，可变电容器件，可选择的电容器件和电容控制器，其被配置为向可选择的电容器件提供控制信号。 可选择的电容器件连接到振荡器并且响应于控制信号，使得可选择的电容器件具有第一控制信号值的第一电容和处于第二控制信号值的第二电容。 电容控制器仅通过提供具有第一控制信号值的控制信号来选择第一电容或第二电容，以选择第一电容并具有第二控制信号值来选择第二电容。
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公开(公告)号：US08421541B2
公开(公告)日：2013-04-16
申请号：US12606003
申请日：2009-10-26
IPC分类号： H03F3/04
CPC分类号： H03F1/3211 , H03F1/3223 , H03F3/45188 , H03F2203/45024 , H03F2203/45166 , H03F2203/45318 , H03F2203/45366
摘要： Techniques for designing a highly differential single-ended-to-differential converter for use in, e.g., communications receivers. In an exemplary embodiment, an auxiliary current path including cascomp transistors is coupled to a main current path including input transistors and cascode transistors. The transistors are biased such that inter-modulation products generated by the auxiliary current path cancel out inter-modulation products generated by the main current path. In another exemplary embodiment, current source transistors for the main current path are adaptively biased depending on the level of the input signal received. In an exemplary embodiment, the techniques may be applied to designing a converter for interfacing a single-ended low-noise amplifier (LNA) output voltage with a differential mixer input in a communications receiver.
摘要翻译： 用于设计用于例如通信接收机的高差分单端到差分转换器的技术。 在示例性实施例中，包括cascomp晶体管的辅助电流路径耦合到包括输入晶体管和共源共栅晶体管的主电流路径。 晶体管被偏置，使得由辅助电流路径产生的互调产物抵消由主电流路径产生的互调产物。 在另一个示例性实施例中，用于主电流路径的电流源晶体管根据所接收的输入信号的电平自适应地偏置。 在示例性实施例中，这些技术可以应用于设计用于将单端低噪声放大器（LNA）输出电压与通信接收机中的差分混合器输入接口的转换器。
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公开(公告)号：US08098110B2
公开(公告)日：2012-01-17
申请号：US12623097
申请日：2009-11-20
申请人： Bo Yang , Harish S. Muthali , Kenneth C. Barnett
发明人： Bo Yang , Harish S. Muthali , Kenneth C. Barnett
CPC分类号： H03L1/023 , H03L2207/05 , H03L2207/06
摘要： A phase locked loop apparatus includes an oscillator, a variable capacitance device, a selectable capacitance device, and a capacitance controller that is configured to provide a control signal to the selectable capacitance device. The selectable capacitance device is connected to the oscillator and is responsive to the control signal such that the selectable capacitance device has a first capacitance at a first control signal value and a second capacitance at a second control signal value. The capacitance controller only selects either the first capacitance or the second capacitance by providing a control signal that has the first control signal value to select the first capacitance and having the second control signal value to select the second capacitance.
摘要翻译： 锁相环装置包括振荡器，可变电容器件，可选择的电容器件和电容控制器，其被配置为向可选择的电容器件提供控制信号。 可选择的电容器件连接到振荡器并且响应于控制信号，使得可选择的电容器件具有第一控制信号值的第一电容和处于第二控制信号值的第二电容。 电容控制器仅通过提供具有第一控制信号值的控制信号来选择第一电容或第二电容，以选择第一电容并具有第二控制信号值来选择第二电容。
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公开(公告)号：US07888983B2
公开(公告)日：2011-02-15
申请号：US12558278
申请日：2009-09-11
申请人： Kun Zhang , Kenneth C. Barnett
发明人： Kun Zhang , Kenneth C. Barnett
IPC分类号： H03K3/017
CPC分类号： H03K5/1565 , H03K21/38 , H03K23/00
摘要： Techniques for generating a signal having a predetermined duty cycle. In an exemplary embodiment, a first counter is configured to count a first number of cycles of an oscillator signal, and a second counter is configured to count a second number of cycles of the oscillator signal, with the second number being greater than the first number. The output of the second counter is used to reset the first and second counters, while the outputs of the first and second counters further drive a toggle latch for generating the signal having predetermined duty cycle. Further aspects include techniques for accommodating odd and even values for the second number.
摘要翻译： 用于产生具有预定占空比的信号的技术。 在示例性实施例中，第一计数器被配置为对振荡器信号的第一数量的周期进行计数，并且第二计数器被配置为对振荡器信号的第二数量的周期进行计数，其中第二数量大于第一数量 。 第二计数器的输出用于复位第一和第二计数器，而第一和第二计数器的输出进一步驱动用于产生具有预定占空比的信号的触发锁存器。 另外的方面包括用于适应第二数量的奇数和偶数值的技术。
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公开(公告)号：US20100329158A1
公开(公告)日：2010-12-30
申请号：US12606003
申请日：2009-10-26
CPC分类号： H03F1/3211 , H03F1/3223 , H03F3/45188 , H03F2203/45024 , H03F2203/45166 , H03F2203/45318 , H03F2203/45366
摘要： Techniques for designing a highly differential single-ended-to-differential converter for use in, e.g., communications receivers. In an exemplary embodiment, an auxiliary current path including cascomp transistors is coupled to a main current path including input transistors and cascode transistors. The transistors are biased such that inter-modulation products generated by the auxiliary current path cancel out inter-modulation products generated by the main current path. In another exemplary embodiment, current source transistors for the main current path are adaptively biased depending on the level of the input signal received. In an exemplary embodiment, the techniques may be applied to designing a converter for interfacing a single-ended low-noise amplifier (LNA) output voltage with a differential mixer input in a communications receiver.
摘要翻译： 用于设计用于例如通信接收机的高差分单端到差分转换器的技术。 在示例性实施例中，包括cascomp晶体管的辅助电流路径耦合到包括输入晶体管和共源共栅晶体管的主电流路径。 晶体管被偏置，使得由辅助电流路径产生的互调产物抵消由主电流路径产生的互调产物。 在另一个示例性实施例中，用于主电流路径的电流源晶体管根据所接收的输入信号的电平自适应地偏置。 在示例性实施例中，这些技术可以应用于设计用于将单端低噪声放大器（LNA）输出电压与通信接收机中的差分混合器输入接口的转换器。
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公开(公告)号：US20100327929A1
公开(公告)日：2010-12-30
申请号：US12558278
申请日：2009-09-11
申请人： Kun Zhang , Kenneth C. Barnett
发明人： Kun Zhang , Kenneth C. Barnett
IPC分类号： H03K3/017
CPC分类号： H03K5/1565 , H03K21/38 , H03K23/00
摘要： Techniques for generating a signal having a predetermined duty cycle. In an exemplary embodiment, a first counter is configured to count a first number of cycles of an oscillator signal, and a second counter is configured to count a second number of cycles of the oscillator signal, with the second number being greater than the first number. The output of the second counter is used to reset the first and second counters, while the outputs of the first and second counters further drive a toggle latch for generating the signal having predetermined duty cycle. Further aspects include techniques for accommodating odd and even values for the second number.
摘要翻译： 用于产生具有预定占空比的信号的技术。 在示例性实施例中，第一计数器被配置为对振荡器信号的第一数量的周期进行计数，并且第二计数器被配置为对振荡器信号的第二数量的周期进行计数，其中第二数量大于第一数量 。 第二计数器的输出用于复位第一和第二计数器，而第一和第二计数器的输出进一步驱动用于产生具有预定占空比的信号的触发锁存器。 另外的方面包括用于适应第二数量的奇数和偶数值的技术。
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公开(公告)号：US5945985A
公开(公告)日：1999-08-31
申请号：US650838
申请日：1996-05-20
CPC分类号： G09B29/106 , G09B27/08
摘要： An interactive multimedia geographic system is disclosed which incorporates an animated three-dimensional solid model of a world globe and utilizes video, sound, graphics, images and numerical presentations for perspective display of detailed maps of the world or portions of the maps. The system is capable of generating desired regional, global, political, and other maps detailing information on various geographic related features, such as demographic, cartographic, topographic, and geomagnetic features of the world. The system is coordinated with a physical globe which highlights the region of interest, and maintains a sense of perspective and relations among geographical regions as the display of the world model changes to reveal further details.
摘要翻译： 公开了一种交互式多媒体地理系统，其包含世界地球仪的动画三维实体模型，并利用视频，声音，图形，图像和数字呈现来透视显示世界地图或地图的一部分。 该系统能够产生所需的区域，全球，政治和其他地图，详细描述各种地理相关特征的信息，例如世界的人口统计学，地图学，地形学和地磁学特征。 该系统与物理地球仪协调一致，突出了该地区的兴趣，并保持了地理区域之间的视角和关系感，因为世界模型的展示变化，以揭示更多的细节。
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