公开(公告)号：US20240266000A1

公开(公告)日：2024-08-08

申请号：US18433401

申请日：2024-02-06

Applicant: Keun Woo LEE

Inventor： Keun Woo LEE ,  Seong Jun SEO ,  Su Youn PARK

IPC: G16B30/20

CPC classification number: G16B30/20

Abstract: The present specification discloses a DNA encoding and decoding method capable of converting and storing data more efficiently, wherein the DNA encoding method according to the present specification may convert binary data into sequence information using basic base values and degenerate base values, the degenerate base value may be a combination of at least two basic base values among four basic bases and the DNA decoding method according to the present specification may divide the basic base value and the degenerate base value into binary data according to base types for the same position in a plurality of DNA strands.

公开(公告)号：US20090067257A1

公开(公告)日：2009-03-12

申请号：US12055641

申请日：2008-03-26

Applicant: Keun Woo LEE ,  Ki Seog KIM

Inventor： Keun Woo LEE ,  Ki Seog KIM

IPC: G11C16/16 ,  G11C16/34

CPC classification number: G11C16/26 ,  G11C16/0483 ,  G11C16/349

Abstract: A flash memory device and a method of operating the same is disclosed, in which the conditions of voltage (or current) applied during the reading operation are differently adjusted according to an accumulated number of times of a programming operation, an erasing operation or a reading operation (an accumulated number of operation cycle). Even if a level of the threshold voltage is changed to a level which differs from that of the target voltage by an increase of the accumulated number of operation cycle regardless of the programming operation (or the erasing operation) being normally performed, the reliability of the reading operation can be enhanced to prevent a malfunction of the memory cell from being generated.

Abstract translation: 公开了一种闪速存储装置及其操作方法，其中根据编程操作，擦除操作或读取的累积次数，不同地调整在读取操作期间施加的电压（或电流）的条件 操作（累计操作周期数）。 即使通过正常执行编程操作（或擦除操作），通过累积操作周期数的增加，阈值电压的电平变化到与目标电压的电平不同的电平，则可靠性 可以增强读取操作以防止生成存储器单元的故障。

公开(公告)号：US20090017619A1

公开(公告)日：2009-01-15

申请号：US12169790

申请日：2008-07-09

Applicant: Young Jin LEE ,  Baek Mann KIM ,  Soo Hyun KIM ,  Dong Ha JUNG ,  Jeong Tae KIM ,  Hyeong Tag JEON ,  Keun Woo LEE ,  Keun Jun KIM ,  Tae Yong PARK

Inventor： Young Jin LEE ,  Baek Mann KIM ,  Soo Hyun KIM ,  Dong Ha JUNG ,  Jeong Tae KIM ,  Hyeong Tag JEON ,  Keun Woo LEE ,  Keun Jun KIM ,  Tae Yong PARK

IPC: H01L21/44

CPC classification number: H01L21/28518 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76855

Abstract: A metal suicide layer is fabricated in a semiconductor device. A first metal layer is deposited on a silicon substrate formed with an S interlayer dielectric having a contact hole through PVD. A second metal layer is deposited on the first metal layer through any one of CVD and ALD. Annealing is performed on the silicon substrate which is formed with the first and second metal layers to form the metal silicide. The portions of the second metal layer and the first metal layer which have not reacted during annealing are removed.

Abstract translation: 在半导体器件中制造金属硅化物层。 第一金属层沉积在由具有通过PVD的接触孔的S层间电介质形成的硅衬底上。 通过CVD和ALD中的任一种将第二金属层沉积在第一金属层上。 在由第一和第二金属层形成的硅衬底上进行退火以形成金属硅化物。 去除在退火过程中没有反应的第二金属层和第一金属层的部分。

公开(公告)号：US20080251847A1

公开(公告)日：2008-10-16

申请号：US11771146

申请日：2007-06-29

Applicant: Keun Woo LEE

Inventor： Keun Woo LEE

IPC: H01L27/105

CPC classification number: H01L27/11524 ,  H01L27/115 ,  H01L27/11521

Abstract: A memory cell array in a semiconductor device includes a semiconductor substrate having active areas and isolation areas in parallel, a plurality of select lines having generally a U like shape and is configured to cross over the active areas and the isolation areas, and a plurality of word lines formed between the select lines. In view of the select line being formed in U like shape, an occurrence of a punch through phenomenon is prevented by a junction area formed between the select lines. As a result, a margin for reducing a width of the select line is increased.

Abstract translation: 半导体器件中的存储单元阵列包括具有活动区域和隔离区域的半导体衬底，多个选择线具有大致U形形状并且被配置为跨过有源区域和隔离区域，并且多个 在选择行之间形成的字线。 鉴于选择线形成为U形形状，通过形成在选择线之间的接合区域来防止穿孔现象的发生。 结果，增加了用于减小选择线的宽度的余量。

公开(公告)号：US20120170376A1

公开(公告)日：2012-07-05

申请号：US13339092

申请日：2011-12-28

Applicant: Hee Youl LEE ,  Keun Woo LEE

Inventor： Hee Youl LEE ,  Keun Woo LEE

IPC: G11C16/06

CPC classification number: G11C16/344 ,  G11C16/14 ,  G11C16/3418

Abstract: A semiconductor memory device includes a plurality of memory cells, including an N well formed within a P type region and a P well formed within the N well, a peripheral circuit configured to perform a program, program verify, read, erase, or erase verify operation on memory cells selected from among the memory cells, a voltage supply circuit configured to generate a positive voltage and a negative voltage for the program, program verify, read, erase, or erase verify operation, and a control circuit configured to control the peripheral circuit and the voltage supply circuit so that the program, program verify, read, erase, or erase verify operation is performed and, when the program verify and read operations are performed, different voltage is supplied to the P well and the N well.

Abstract translation: 半导体存储器件包括多个存储器单元，包括在P型区域内形成的N阱和形成在N阱内的P阱，配置为执行程序，程序验证，读取，擦除或擦除验证的外围电路 对从存储单元中选择的存储单元进行操作;电压供给电路，被配置为产生用于程序的正电压和负电压，程序验证，读取，擦除或擦除验证操作;以及控制电路， 电路和电压供应电路，以便执行程序，程序验证，读取，擦除或擦除验证操作，并且当执行程序验证和读取操作时，向P阱和N阱提供不同的电压。

公开(公告)号：US20200044998A1

公开(公告)日：2020-02-06

申请号：US16339985

申请日：2017-09-29

Applicant: Chang Sub JEON ,  Keun Woo LEE

Inventor： Chang Sub JEON ,  Keun Woo LEE ,  Yong Joo SHIM

IPC: H04L12/58 ,  H04L12/18 ,  A63F13/80 ,  G06Q30/02

Abstract: A method, system, and quiz server for providing a quiz and an advertisement simultaneously in an IMS chat is provided. The method includes creating a chat room from a mobile terminal while inviting a pre-registered quizbot as a chat participant, displaying a quiz and an advertisement within the chat room on the mobile terminal in the form of a chat message composed by the quizbot, and displaying, within the chat room, an answer of a certain chat participant with respect to the quiz, and inputting a result of determination of whether the answer is correct into the chat room by using the quizbot, displaying, within the chat room, the answer of the certain chat participant with respect to the quiz, and inputting a result of determination of whether the answer is correct into the chat room by using the quizbot.

公开(公告)号：US20080153234A1

公开(公告)日：2008-06-26

申请号：US12041932

申请日：2008-03-04

Applicant: Keun Woo LEE

Inventor： Keun Woo LEE

IPC: H01L21/336

CPC classification number: H01L27/115 ,  H01L27/11519 ,  H01L27/11521

Abstract: A non-volatile memory device includes a semiconductor substrate having an active region defined by isolation films that extend along a first direction. A control gate line extends along in a second direction perpendicular to the first direction. First and second floating gates are formed on the active region and below the control gate line. An island conductive line is formed between the first and second floating gates and within the isolation films. The island conductive line extends along the first direction and is configured to receive a voltage in order to prevent interference between the first and second floating gates.

Abstract translation: 非易失性存储器件包括具有由沿着第一方向延伸的隔离膜限定的有源区的半导体衬底。 控制栅极线沿垂直于第一方向的第二方向延伸。 第一和第二浮栅形成在有源区和控制栅线下方。 岛状导电线形成在第一和第二浮栅之间以及隔离膜内。 岛状导电线沿着第一方向延伸并且被配置为接收电压，以便防止第一和第二浮动栅极之间的干扰。