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    FUSE ATTESTATION TO SECURE THE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING
    2.
    发明申请
    FUSE ATTESTATION TO SECURE THE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING 有权
    保险丝安全确保集成电路制造过程中秘密钥匙的提供

    公开(公告)号：US20140185795A1

    公开(公告)日：2014-07-03

    申请号：US13728375

    申请日：2012-12-27

    申请人： Kevin C. Gotze ,  Jiangtao Li ,  Gregory M. Iovino

    发明人： Kevin C. Gotze ,  Jiangtao Li ,  Gregory M. Iovino

    IPC分类号： H04L9/08

    CPC分类号： G06F21/73 ,  G06F21/44 ,  G09C1/00 ,  H04L9/0861 ,  H04L9/0866 ,  H04L9/3278

    摘要： Embodiments of an invention for fuse attestation to secure the provisioning of secret keys during integrated circuit manufacturing are disclosed. In one embodiment, an apparatus includes a storage location, a physically unclonable function (PUF) circuit, a PUF key generator, an encryption unit, and a plurality of fuses. The storage location is to store a configuration fuse value. The PUF circuit is to provide a PUF value. The PUF key generator is to generate a PUF key based on the PUF value. The encryption unit is to encrypt the configuration fuse value using the PUF key. The PUF key and the configuration fuse value are to be provided to a key server. The key server is to determine that the configuration fuse value indicates that the apparatus is a production component, and, in response, provide a fuse key to be stored in the plurality of fuses.

    摘要翻译： 公开了用于在集成电路制造期间确保秘密密钥供应的熔丝证明的发明的实施例。 在一个实施例中，一种装置包括存储位置，物理上不可克隆功能（PUF）电路，PUF密钥发生器，加密单元和多个保险丝。 存储位置是存储配置熔丝值。 PUF电路提供PUF值。 PUF密钥生成器基于PUF值生成PUF密钥。 加密单元使用PUF密钥加密配置熔丝值。 PUF键和配置保险丝值将提供给密钥服务器。 密钥服务器是确定配置熔丝值表示该设备是生产部件，并且作为响应，提供要存储在多个保险丝中的熔丝钥匙。

    SECURE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING
    3.
    发明申请
    SECURE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING 有权
    在集成电路制造过程中安全提供秘密钥匙

    公开(公告)号：US20140093074A1

    公开(公告)日：2014-04-03

    申请号：US13631512

    申请日：2012-09-28

    申请人： Kevin C. Gotze ,  Gregory M. Iovino ,  Jiangtao Li

    发明人： Kevin C. Gotze ,  Gregory M. Iovino ,  Jiangtao Li

    IPC分类号： H04L9/00

    CPC分类号： H04L9/0866 ,  H04L9/3278

    摘要： A method, of an aspect, includes challenging a set of Physically Unclonable Function (PUF) cells, of an integrated circuit device, and receiving a set of PUF bits from the PUF cells in response. A PUF key is generated based on the set of PUF bits. An encryption of the PUF key with an embedded key is output from the integrated circuit device. The integrated circuit device receives an encryption of a fuse key with the PUF key. Fuses of the integrated circuit device are programmed with at least one of the fuse key and the received encryption of the fuse key with the PUF key. Other methods, apparatus, and systems are also disclosed.

    摘要翻译： 一方面的方法包括挑战集成电路设备的一组物理不可克隆功能（PUF）单元，以及响应于从PUF单元接收一组PUF位。 基于PUF位的集合生成PUF密钥。 从集成电路设备输出使用嵌入式密钥对PUF密钥的加密。 集成电路装置利用PUF键接收熔丝钥匙的加密。 集成电路装置的保险丝用熔丝钥匙和熔丝钥匙的接收加密中的至少一个与PUF密钥进行编程。 还公开了其它方法，装置和系统。

    SECURE KEY DERIVATION AND CRYPTOGRAPHY LOGIC FOR INTEGRATED CIRCUITS
    4.
    发明申请
    SECURE KEY DERIVATION AND CRYPTOGRAPHY LOGIC FOR INTEGRATED CIRCUITS 有权
    集成电路的安全关键衍生和拼接逻辑

    公开(公告)号：US20140189365A1

    公开(公告)日：2014-07-03

    申请号：US13730829

    申请日：2012-12-29

    申请人： George W. Cox ,  David Johnston ,  Jiangtao Li ,  Anand Rajan

    发明人： George W. Cox ,  David Johnston ,  Jiangtao Li ,  Anand Rajan

    IPC分类号： G06F21/72

    CPC分类号： G06F21/72 ,  G06F21/52 ,  G06F21/73 ,  G09C1/00 ,  H04L9/0866 ,  H04L2209/12

    摘要： A processor of an aspect includes root key generation logic to generate a root key. The root key generation logic includes a source of static and entropic bits. The processor also includes key derivation logic coupled with the root key generation logic. The key derivation logic is to derive one or more keys from the root key. The processor also includes cryptographic primitive logic coupled with the root key generation logic. The cryptographic primitive logic is to perform cryptographic operations. The processor also includes a security boundary containing the root key generation logic, the key derivation logic, and the cryptographic primitive logic. Other processors, methods, and systems are also disclosed.

    摘要翻译： 一方面的处理器包括生成根密钥的根密钥生成逻辑。 根密钥生成逻辑包括静态和熵位的源。 处理器还包括与根密钥生成逻辑耦合的密钥导出逻辑。 密钥推导逻辑是从根密钥导出一个或多个密钥。 处理器还包括与根密钥生成逻辑耦合的加密原语逻辑。 加密原语逻辑是执行加密操作。 处理器还包括包含根密钥生成逻辑，密钥导出逻辑和密码原语逻辑的安全边界。 还公开了其他处理器，方法和系统。

    USING DARK BITS TO REDUCE PHYSICAL UNCLONABLE FUNCTION (PUF) ERROR RATE WITHOUT STORING DARK BITS LOCATION
    5.
    发明申请
    USING DARK BITS TO REDUCE PHYSICAL UNCLONABLE FUNCTION (PUF) ERROR RATE WITHOUT STORING DARK BITS LOCATION 有权
    使用深色位置减少物理不可靠功能（PUF）错误率，而不会存储明显的位置

    公开(公告)号：US20150178143A1

    公开(公告)日：2015-06-25

    申请号：US14140243

    申请日：2013-12-24

    申请人： Sanu K. Mathew ,  Sudhir K. Satpathy ,  Patrick Koeberl ,  Jiangtao Li ,  Ram K. Krishnamurthy ,  Anand Rajan

    发明人： Sanu K. Mathew ,  Sudhir K. Satpathy ,  Patrick Koeberl ,  Jiangtao Li ,  Ram K. Krishnamurthy ,  Anand Rajan

    IPC分类号： G06F11/07

    CPC分类号： G06F11/0793 ,  G06F7/00 ,  G06F7/588 ,  G06F11/0745 ,  G11C7/24 ,  H04L9/3278 ,  H04L9/34

    摘要： Dark-bit masking technologies for physically unclonable function (PUF) components are described. A computing system includes a processor core and a secure key manager component coupled to the processor core. The secure key manager includes the PUF component, and a dark-bit masking circuit coupled to the PUF component. The dark-bit masking circuit is to measure a PUF value of the PUF component multiple times during a dark-bit window to detect whether the PUF value of the PUF component is a dark bit. The dark bit indicates that the PUF value of the PUF component is unstable during the dark-bit window. The dark-bit masking circuit is to output the PUF value as an output PUF bit of the PUF component when the PUF value is not the dark bit and set the output PUF bit to be a specified value when the PUF value of the PUF component is the dark bit.

    摘要翻译： 描述了用于物理不可克隆功能（PUF）组件的暗位掩蔽技术。 计算系统包括处理器核心和耦合到处理器核心的安全密钥管理器组件。 安全密钥管理器包括PUF组件和耦合到PUF组件的暗位屏蔽电路。 暗位掩蔽电路是在暗位窗口期间多次测量PUF分量的PUF值，以检测PUF分量的PUF值是否为暗位。 暗位表示PUF组件的PUF值在暗位窗口期间不稳定。 当PUF值不是暗位时，暗位屏蔽电路将输出PUF值作为PUF分量的输出PUF位，并且当PUF分量的PUF值为 黑暗的一点

    SECURE KEY STORAGE USING PHYSICALLY UNCLONABLE FUNCTIONS
    6.
    发明申请
    SECURE KEY STORAGE USING PHYSICALLY UNCLONABLE FUNCTIONS 有权
    使用物理不可靠函数确保关键存储

    公开(公告)号：US20140201540A1

    公开(公告)日：2014-07-17

    申请号：US13996544

    申请日：2011-12-29

    申请人： Jiangtao Li ,  Anand Rajan ,  Roel Maes ,  Sanu K Mathew ,  Ram Krishnamurthy ,  Ernie Brickell

    发明人： Jiangtao Li ,  Anand Rajan ,  Roel Maes ,  Sanu K Mathew ,  Ram Krishnamurthy ,  Ernie Brickell

    IPC分类号： H04L9/08

    CPC分类号： H04L9/0891 ,  G09C1/00 ,  H04L9/0822 ,  H04L9/0861 ,  H04L9/0866 ,  H04L9/0894 ,  H04L2209/12

    摘要： Some implementations disclosed herein provide techniques and arrangements for provisioning keys to integrated circuits/processors. A processor may include physically unclonable functions component, which may generate a unique hardware key based at least on at least one physical characteristic of the processor. The hardware key may be employed in encrypting a key such as a secret key. The encrypted key may be stored in a memory of the processor. The encrypted key may be validated. The integrity of the key may be protected by communicatively isolating at least one component of the processor.

    摘要翻译： 本文公开的一些实施例提供了用于向集成电路/处理器供应密钥的技术和布置 处理器可以包括物理上不可克隆的功能组件，其可以至少基于处理器的至少一个物理特性来生成唯一的硬件密钥。 硬件密钥可用于加密诸如秘密密钥的密钥。 加密密钥可以存储在处理器的存储器中。 可以验证加密的密钥。 可以通过通信地隔离处理器的至少一个组件来保护密钥的完整性。

    Secure key storage using physically unclonable functions
    7.
    发明授权
    Secure key storage using physically unclonable functions 有权
    使用物理不可克隆功能保护密钥存储

    公开(公告)号：US09544141B2

    公开(公告)日：2017-01-10

    申请号：US13996544

    申请日：2011-12-29

    申请人： Jiangtao Li ,  Anand Rajan ,  Roel Maes ,  Sanu K Mathew ,  Ram Krishnamurthy ,  Ernie Brickell

    发明人： Jiangtao Li ,  Anand Rajan ,  Roel Maes ,  Sanu K Mathew ,  Ram Krishnamurthy ,  Ernie Brickell

    IPC分类号： H04L29/06 ,  H04L9/08

    CPC分类号： H04L9/0891 ,  G09C1/00 ,  H04L9/0822 ,  H04L9/0861 ,  H04L9/0866 ,  H04L9/0894 ,  H04L2209/12

    摘要： Some implementations disclosed herein provide techniques and arrangements for provisioning keys to integrated circuits/processors. A processor may include physically unclonable functions component, which may generate a unique hardware key based at least on at least one physical characteristic of the processor. The hardware key may be employed in encrypting a key such as a secret key. The encrypted key may be stored in a memory of the processor. The encrypted key may be validated. The integrity of the key may be protected by communicatively isolating at least one component of the processor.

    摘要翻译： 本文公开的一些实施例提供了用于向集成电路/处理器供应密钥的技术和布置。 处理器可以包括物理上不可克隆的功能组件，其可以至少基于处理器的至少一个物理特性来生成唯一的硬件密钥。 硬件密钥可用于加密诸如秘密密钥的密钥。 加密密钥可以存储在处理器的存储器中。 可以验证加密的密钥。 可以通过通信地隔离处理器的至少一个组件来保护密钥的完整性。

    Offline Device Authentication and Anti-Counterfeiting Using Physically Unclonable Functions
    9.
    发明申请
    Offline Device Authentication and Anti-Counterfeiting Using Physically Unclonable Functions 审中-公开
    使用物理不可克隆功能的离线设备认证和防伪

    公开(公告)号：US20130147511A1

    公开(公告)日：2013-06-13

    申请号：US13313298

    申请日：2011-12-07

    申请人： Patrick Koeberl ,  Jiangtao Li ,  Anand Rajan ,  Claire Vishik

    发明人： Patrick Koeberl ,  Jiangtao Li ,  Anand Rajan ,  Claire Vishik

    IPC分类号： H03K19/23

    CPC分类号： H03K19/23 ,  G06F21/73 ,  H04L9/3263 ,  H04L9/3278

    摘要： The output of a physically unclonable function (PUF) may be processed to reduce its size. The post-processing result is served as a device intrinsic unclonable identifier and is signed by the device manufacturer to create a certificate stored on board the same device that includes the physically unclonable function. This scheme may not require online verification and complex error correction on PUFs in some cases.

    摘要翻译： 可以处理物理不可克隆功能（PUF）的输出以减小其大小。 后处理结果作为设备固有的不可克隆标识符，并由设备制造商签署，以创建存储在同一设备上的证书，其中包含物理上不可克隆的功能。 在某些情况下，该方案可能不需要在线验证和PUF复杂的纠错。