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    FUSE ATTESTATION TO SECURE THE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING
    1.
    发明申请
    FUSE ATTESTATION TO SECURE THE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING 有权
    保险丝安全确保集成电路制造过程中秘密钥匙的提供

    公开(公告)号：US20140185795A1

    公开(公告)日：2014-07-03

    申请号：US13728375

    申请日：2012-12-27

    申请人： Kevin C. Gotze ,  Jiangtao Li ,  Gregory M. Iovino

    发明人： Kevin C. Gotze ,  Jiangtao Li ,  Gregory M. Iovino

    IPC分类号： H04L9/08

    CPC分类号： G06F21/73 ,  G06F21/44 ,  G09C1/00 ,  H04L9/0861 ,  H04L9/0866 ,  H04L9/3278

    摘要： Embodiments of an invention for fuse attestation to secure the provisioning of secret keys during integrated circuit manufacturing are disclosed. In one embodiment, an apparatus includes a storage location, a physically unclonable function (PUF) circuit, a PUF key generator, an encryption unit, and a plurality of fuses. The storage location is to store a configuration fuse value. The PUF circuit is to provide a PUF value. The PUF key generator is to generate a PUF key based on the PUF value. The encryption unit is to encrypt the configuration fuse value using the PUF key. The PUF key and the configuration fuse value are to be provided to a key server. The key server is to determine that the configuration fuse value indicates that the apparatus is a production component, and, in response, provide a fuse key to be stored in the plurality of fuses.

    摘要翻译： 公开了用于在集成电路制造期间确保秘密密钥供应的熔丝证明的发明的实施例。 在一个实施例中，一种装置包括存储位置，物理上不可克隆功能（PUF）电路，PUF密钥发生器，加密单元和多个保险丝。 存储位置是存储配置熔丝值。 PUF电路提供PUF值。 PUF密钥生成器基于PUF值生成PUF密钥。 加密单元使用PUF密钥加密配置熔丝值。 PUF键和配置保险丝值将提供给密钥服务器。 密钥服务器是确定配置熔丝值表示该设备是生产部件，并且作为响应，提供要存储在多个保险丝中的熔丝钥匙。

    Method and apparatus for independent control of devices under test connected in parallel
    2.
    发明授权
    Method and apparatus for independent control of devices under test connected in parallel 有权
    用于独立控制被测设备并联的方法和装置

    公开(公告)号：US07231552B2

    公开(公告)日：2007-06-12

    申请号：US10280458

    申请日：2002-10-24

    申请人： Rachael J. Parker ,  Gregory M. Iovino

    发明人： Rachael J. Parker ,  Gregory M. Iovino

    IPC分类号： G06F11/00

    CPC分类号： G01R31/318555 ,  G01R31/318544 ,  G11C29/48 ,  G11C2029/2602 ,  G11C2029/5602

    摘要： A JTAG-compatible device includes a unique identifier stored in dedicated non-volatile memory, a test access port (TAP) controller, a TAP instruction register, a dedicated data register, and a comparison block. The TAP instruction register enables and/or disables TAP instruction execution by the device. The dedicated data register is of a length that is the same or a subset of the length of the unique identifier. The comparison block can be an arithmetic logic unit (ALU) or other circuitry that compares a code scanned into the dedicated data register with the unique identifier stored in a PROM. The TAP controller can selectively ignore TAP commands if a code scanned into dedicated data register does not match the stored unique identifier. This allows the TAP controller to conditionally or independently control several devices that are connected in parallel. The unique identifier can be device-specific, device type-specific, and/or device configuration specific.

    摘要翻译： JTAG兼容设备包括存储在专用非易失性存储器中的唯一标识符，测试访问端口（TAP）控制器，TAP指令寄存器，专用数据寄存器和比较块。 TAP指令寄存器使能和/或禁止器件执行TAP指令。 专用数据寄存器的长度与唯一标识符的长度相同或子集。 比较块可以是算术逻辑单元（ALU）或将扫描到专用数据寄存器中的代码与存储在PROM中的唯一标识符进行比较的其他电路。 如果扫描到专用数据寄存器中的代码与存储的唯一标识符不匹配，则TAP控制器可以选择性地忽略TAP命令。 这允许TAP控制器有条件地或独立地控制并联连接的多个设备。 唯一标识符可以是特定于设备的设备类型，和/或设备配置。

    SECURE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING
    3.
    发明申请
    SECURE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING 有权
    在集成电路制造过程中安全提供秘密钥匙

    公开(公告)号：US20140093074A1

    公开(公告)日：2014-04-03

    申请号：US13631512

    申请日：2012-09-28

    申请人： Kevin C. Gotze ,  Gregory M. Iovino ,  Jiangtao Li

    发明人： Kevin C. Gotze ,  Gregory M. Iovino ,  Jiangtao Li

    IPC分类号： H04L9/00

    CPC分类号： H04L9/0866 ,  H04L9/3278

    摘要： A method, of an aspect, includes challenging a set of Physically Unclonable Function (PUF) cells, of an integrated circuit device, and receiving a set of PUF bits from the PUF cells in response. A PUF key is generated based on the set of PUF bits. An encryption of the PUF key with an embedded key is output from the integrated circuit device. The integrated circuit device receives an encryption of a fuse key with the PUF key. Fuses of the integrated circuit device are programmed with at least one of the fuse key and the received encryption of the fuse key with the PUF key. Other methods, apparatus, and systems are also disclosed.

    摘要翻译： 一方面的方法包括挑战集成电路设备的一组物理不可克隆功能（PUF）单元，以及响应于从PUF单元接收一组PUF位。 基于PUF位的集合生成PUF密钥。 从集成电路设备输出使用嵌入式密钥对PUF密钥的加密。 集成电路装置利用PUF键接收熔丝钥匙的加密。 集成电路装置的保险丝用熔丝钥匙和熔丝钥匙的接收加密中的至少一个与PUF密钥进行编程。 还公开了其它方法，装置和系统。

    Arrangements having IC voltage and thermal resistance designated on a per IC basis
    6.
    发明授权
    Arrangements having IC voltage and thermal resistance designated on a per IC basis 有权
    具有IC电压和热阻的指令在每个IC基础上的布置

    公开(公告)号：US07233162B2

    公开(公告)日：2007-06-19

    申请号：US11182649

    申请日：2005-07-14

    申请人： Tawfik Arabi ,  Hung-Piao Ma ,  Gregory M. Iovino ,  Shai Rotem ,  Avner Kornfeld ,  Gregory F. Taylor

    发明人： Tawfik Arabi ,  Hung-Piao Ma ,  Gregory M. Iovino ,  Shai Rotem ,  Avner Kornfeld ,  Gregory F. Taylor

    IPC分类号： G01R31/26

    CPC分类号： G01R31/30 ,  G01R31/31718 ,  G06F11/24

    摘要： Systems for testing a plurality of integrated circuits at a plurality of frequencies and voltages is disclosed. In one embodiment, a plurality of integrated circuits is tested at least once within a predetermined set of combinations of frequencies and voltages. If the integrated circuit fails testing within any combination of a frequency and voltage within the predetermined set, the integrated circuit is retested at a different predetermined set of combinations of frequencies and voltages. If the integrated circuit fails testing within any combination of a frequency and voltage within the different predetermined set, the integrated circuit is discarded.

    摘要翻译： 公开了用于在多个频率和电压下测试多个集成电路的系统。 在一个实施例中，多个集成电路在预定的一组频率和电压组合内至少测试一次。 如果集成电路在预定集合内的频率和电压的任何组合内失败测试，​​则以不同的预定组合的频率和电压重新测试集成电路。 如果集成电路在不同预定集合内的频率和电压的任何组合内进行测试失败，则集成电路被丢弃。

    On-die temperature control data for communicating to a thermal actuator
    7.
    发明授权
    On-die temperature control data for communicating to a thermal actuator 有权
    用于与热致动器通信的管芯温度控制数据

    公开(公告)号：US07117114B2

    公开(公告)日：2006-10-03

    申请号：US10924719

    申请日：2004-08-23

    申请人： Tawfik Arabi ,  Hung-Piao Ma ,  Benson D. Inkley ,  Gregory M. Iovino ,  Stephen H. Gunther ,  Matthew C. Reilly

    发明人： Tawfik Arabi ,  Hung-Piao Ma ,  Benson D. Inkley ,  Gregory M. Iovino ,  Stephen H. Gunther ,  Matthew C. Reilly

    IPC分类号： G01K1/08

    CPC分类号： G06F1/206

    摘要： An on-die temperature control variable is provided to throttle a thermal actuator for cooling an integrated circuit. The integrated circuit includes a storage element to hold the temperature control variable. A temperature sensor is thermally coupled to the integrated circuit to sense an operating temperature of the integrated circuit. A thermal controller is communicatively coupled to the storage element and to the temperature sensor. The thermal controller throttles the thermal actuator when the temperature sensor indicates that the operating temperature of the integrated circuit is below the temperature control variable.

    摘要翻译： 提供了一个管芯温度控制变量来节流用于冷却集成电路的热致动器。 集成电路包括用于保持温度控制变量的存储元件。 温度传感器热耦合到集成电路以感测集成电路的工作温度。 热控制器通信地耦合到存储元件和温度传感器。 当温度传感器指示集成电路的工作温度低于温度控制变量时，热控制器会对热致动器进行节流。