Ejector faceplate for electronics module

    公开(公告)号:US20060279183A1

    公开(公告)日:2006-12-14

    申请号:US11147730

    申请日:2005-06-08

    IPC分类号: A47B81/00

    CPC分类号: H05K7/1425 H05K7/1411

    摘要: In one aspect, the present invention provides a latch/ejector face plate assembly for an end of an electronics chassis assembly. The face plate is pivotally couplable to a front end of an electronics chassis. The face plate has a latch/ejector that comprises a latching portion that is latchably engageable against a rear side of a latching/fulcrum flange of a electronics rack shelf when the face plate is in a closed position, and an ejector edge that is engageable against a front side of the latching/fulcrum flange when the face plate is in an open position, to thereby provide an ejection force of the electronics chassis.

    Ejector faceplate for electronics module
    2.
    发明授权
    Ejector faceplate for electronics module 有权
    电子模块排出面板

    公开(公告)号:US07492607B2

    公开(公告)日:2009-02-17

    申请号:US11147730

    申请日:2005-06-08

    IPC分类号: H05K7/12

    CPC分类号: H05K7/1425 H05K7/1411

    摘要: In one aspect, the present invention provides a latch/ejector face plate assembly for an end of an electronics chassis assembly. The face plate is pivotally couplable to a front end of an electronics chassis. The face plate has a latch/ejector that comprises a latching portion that is latchably engageable against a rear side of a latching/fulcrum flange of a electronics rack shelf when the face plate is in a closed position, and an ejector edge that is engageable against a front side of the latching/fulcrum flange when the face plate is in an open position, to thereby provide an ejection force of the electronics chassis.

    摘要翻译: 在一个方面,本发明提供了一种用于电子底盘组件的端部的闩锁/弹出器面板组件。 面板可枢转地连接到电子机箱的前端。 所述面板具有闩锁/弹出器,所述闩锁/弹出器包括闩锁部分,当所述面板处于关闭位置时,所述闩锁部分可闩锁地抵靠电子机架架的闩锁/支点凸缘的后侧接合,以及弹出器边缘, 当面板处于打开位置时,闩锁/支点凸缘的前侧,从而提供电子底盘的弹出力。

    PLANAR ELECTRONIC DEVICE
    4.
    发明申请
    PLANAR ELECTRONIC DEVICE 审中-公开
    平面电子设备

    公开(公告)号:US20140043130A1

    公开(公告)日:2014-02-13

    申请号:US13572318

    申请日:2012-08-10

    IPC分类号: H01F5/00 H03H7/01 H03H7/42

    摘要: A planar electronic device includes top conductors on a top side of a planar substrate connected to conductive vias and defining top conductor groups and bottom conductors on a bottom side connected to corresponding vias and defining bottom conductor groups. The conductors and vias define primary and secondary conductive loops with the top conductor group including at least one primary top conductor and at least one secondary top conductor and with the bottom conductor group including at least one primary bottom conductor and at least one secondary bottom conductor. The top conductors within each group have substantially similar layouts that are different from layouts of the immediately adjacent groups, and the bottom conductors within each group have substantially similar layouts that are different from layouts of the immediately adjacent groups.

    摘要翻译: 平面电子设备包括连接到导电通孔的平面基板的顶侧上的顶部导体,并且在底部侧限定顶部导体组和底部导体,连接到相应的通孔并限定底部导体组。 导体和通孔限定初级和次级导电回路,其中顶部导体组包括至少一个初级顶部导体和至少一个次级顶部导体,并且底部导体组包括至少一个初级底部导体和至少一个次级底部导体。 每个组中的顶部导体具有与紧邻的组的布局不同的基本类似的布局,并且每个组中的底部导体具有与紧邻的组的布局不同的基本相似的布局。

    Planar inductor devices
    5.
    发明授权
    Planar inductor devices 有权
    平面电感器件

    公开(公告)号:US08466769B2

    公开(公告)日:2013-06-18

    申请号:US13087112

    申请日:2011-04-14

    IPC分类号: H01F5/00

    摘要: A multilayer inductor device includes a planar substrate, a ferrite body, and an outer and an inner conductive coil. The substrate includes plural dielectric layers with the ferrite body is disposed in the substrate. The outer and inner conductive coils are helically wrapped around the ferrite body. The outer conductive coil includes first upper conductors, first lower conductors, and first conductive vias vertically extending through the substrate and conductively coupled with the first upper and lower conductors. The inner conductive coil includes second upper conductors, second lower conductors, and second conductive vias vertically extending through the substrate and conductively coupled with the second upper and lower conductors. The inner conductive coil is disposed between the outer conductive coil and the ferrite body.

    摘要翻译: 多层电感器件包括平面衬底,铁氧体,以及外导体线圈和内导电线圈。 基板包括多个电介质层,其中铁氧体主体设置在基板中。 外导电线圈和内导电线圈螺旋缠绕在铁氧体上。 外导电线圈包括第一上导体,第一下导体和垂直延伸穿过衬底并与第一上导体和下导体导电耦合的第一导电通孔。 内导电线圈包括第二上导体,第二下导体和垂直延伸穿过衬底并与第二上导体和下导体导电耦合的第二导电通孔。 内部导电线圈设置在外部导电线圈和铁氧体之间。

    Distributed load edge clamp
    6.
    发明授权
    Distributed load edge clamp 有权
    分布式负载边缘钳位

    公开(公告)号:US07272880B1

    公开(公告)日:2007-09-25

    申请号:US10854976

    申请日:2004-05-27

    IPC分类号: B23P11/00 B23P19/04

    摘要: An arrangement for clamping a flat plate to a flat surface includes juxtaposing the plate to the flat surface. An axially-movable wedging element defining a surface fitted with wedges is fixed against motion in other than a direction of elongation, and is forced to move in the direction of elongation. The wedges are forced against a first spring beam to impart forces thereto. The forces are coupled from the first spring beam to a second spring beam by intermediary supports. The second spring beam bears against a surface of the flat plate to force the plate against the flat surface.

    摘要翻译: 用于将平板夹持到平坦表面的布置包括将平板并置到平坦表面。 限定装配有楔形物的表面的可轴向移动的楔形元件被固定成不同于延伸方向的运动,并且被迫沿伸长方向移动。 楔子被迫抵靠第一弹簧梁以向其施加力。 力通过中间支撑从第一弹簧梁耦合到第二弹簧梁。 第二弹簧梁支撑在平板的表面上,以迫使板抵靠平坦表面。

    Method, apparatus and computer program product for high speed memory testing
    7.
    发明授权
    Method, apparatus and computer program product for high speed memory testing 失效
    用于高速内存测试的方法,设备和计算机程序产品

    公开(公告)号:US06970798B1

    公开(公告)日:2005-11-29

    申请号:US10840559

    申请日:2004-05-06

    IPC分类号: G06F19/00

    CPC分类号: G06F11/263 G06F11/273

    摘要: For testing a device under test (“DUT”) a test specification is converted in a computer system by a pin vector generator process, which includes generating test vectors. The DUT has numerous input pins and such a pin vector is for a signal to drive one such pin. The pin vectors are compressed and saved. Ones of the pin vectors are loaded, upon initialization of a test, into a pipeline having a series of memory stages and extending from the computer system to channel cards in a test head. The pipeline is operated in data transfer cycles, delivering W bits per cycle. The pin vectors are decompressed at the respective channel cards in decompressor read cycles. X bits are read per decompressor cycle, W being greater than X, so that the pipeline may perform its data transfer cycles less frequently than the decompressor performs its read cycles.

    摘要翻译: 为了测试被测设备(“DUT”),测试规范在计算机系统中通过引脚向量生成器进程进行转换,其中包括生成测试向量。 DUT具有许多输入引脚,并且这样的引脚矢量用于信号来驱动一个这样的引脚。 引脚向量被压缩并保存。 在测试初始化​​时,引导向量的载入被加载到具有一系列存储器级并且从计算机系统延伸到测试头中的通道卡的管道中。 流水线在数据传输周期中运行,每个周期提供W位。 在解压缩器读取周期中,引脚向量在相应的通道卡处被解压缩。 每个解压缩器周期读取X位,W大于X,使得流水线可以比解压缩器执行其读周期更不频繁地执行其数据传送周期。

    Notched gate structure fabrication
    8.
    发明授权
    Notched gate structure fabrication 失效
    缺口门结构制造

    公开(公告)号:US06875668B2

    公开(公告)日:2005-04-05

    申请号:US10179824

    申请日:2002-06-24

    摘要: Aspects for notched gate structure fabrication are described. The notched gate fabrication includes forming spacers of hard mask material on a gate conductor, and utilizing the spacers during etching to form notches in the gate conductor and provide a notched gate structure. In a further aspect, notched gate fabrication includes performing a timed etch of masked gate conductive material to maintain a portion of a gate conductive layer and provide gate structure areas in the gate conductive layer. Anisotropically etching the gate structure areas provides spacers on the gate structure areas. Isotropically etching the portion of the gate conductive layer provides notched gates in the gate structure areas.

    摘要翻译: 描述了切口栅极结构制造的方面。 缺口门制造包括在栅极导体上形成硬掩模材料的间隔物,并且在蚀刻期间利用间隔物在栅极导体中形成凹口并提供缺口栅极结构。 在另一方面,切口栅极制造包括执行掩模栅极导电材料的定时蚀刻以保持栅极导电层的一部分并在栅极导电层中提供栅极结构区域。 栅极结构区域的各向异性蚀刻在栅极结构区域上提供间隔物。 各向同性蚀刻栅极导电层的部分在栅极结构区域中提供有缺口的栅极。

    Apparatus and method for holding a cover in a closed orientation
    9.
    发明授权
    Apparatus and method for holding a cover in a closed orientation 有权
    用于将盖保持在封闭取向的装置和方法

    公开(公告)号:US08789856B2

    公开(公告)日:2014-07-29

    申请号:US11566536

    申请日:2006-12-04

    摘要: An apparatus for holding a cover in a closed orientation substantially covering a chassis face of a unit; the unit containing equipment in an equipment volume; the equipment volume being partially bounded by the chassis face; includes: a positioning structure coupling the cover with the unit for selectively situating the cover in the closed orientation or in an other orientation; and a latching structure configured for latchingly engaging the chassis face and the cover for holding the cover in the closed orientation when the latching structure is in a first orientation. The latching structure does not engage the chassis face and the cover when the latching structure is in a second orientation. The latching structure is situated substantially entirely outside the equipment volume.

    摘要翻译: 一种用于将盖子保持在基本上覆盖单元的底盘面的封闭取向的装置; 设备容量中包含设备的单位; 设备体积部分地由底盘面限制; 包括:定位结构,其将所述盖与所述单元联接,用于以所述封闭取向或另一方向选择性地定位所述盖; 以及闩锁结构,其构造成用于当所述闩锁结构处于第一取向时,将所述底盘面和所述盖闩锁地接合以将所述盖保持在所述封闭取向。 当闩锁结构处于第二方向时,闩锁结构不接合底盘面和盖。 闩锁结构基本上完全位于设备体积外部。

    PLANAR INDUCTOR DEVICES
    10.
    发明申请
    PLANAR INDUCTOR DEVICES 有权
    平面电感器器件

    公开(公告)号:US20110291789A1

    公开(公告)日:2011-12-01

    申请号:US13087112

    申请日:2011-04-14

    IPC分类号: H01F5/00

    摘要: A multilayer inductor device includes a planar substrate, a ferrite body, and an outer and an inner conductive coil. The substrate includes plural dielectric layers with the ferrite body is disposed in the substrate. The outer and inner conductive coils are helically wrapped around the ferrite body. The outer conductive coil includes first upper conductors, first lower conductors, and first conductive vias vertically extending through the substrate and conductively coupled with the first upper and lower conductors. The inner conductive coil includes second upper conductors, second lower conductors, and second conductive vias vertically extending through the substrate and conductively coupled with the second upper and lower conductors. The inner conductive coil is disposed between the outer conductive coil and the ferrite body.

    摘要翻译: 多层电感器件包括平面衬底,铁氧体,以及外导体线圈和内导电线圈。 基板包括多个电介质层,其中铁氧体主体设置在基板中。 外导电线圈和内导电线圈螺旋缠绕在铁氧体上。 外导电线圈包括第一上导体,第一下导体和垂直延伸穿过衬底并与第一上导体和下导体导电耦合的第一导电通孔。 内导电线圈包括第二上导体,第二下导体和垂直延伸穿过衬底并与第二上导体和下导体导电耦合的第二导电通孔。 内部导电线圈设置在外部导电线圈和铁氧体之间。