Configurable ASIC for use with a programmable I/O module
    1.
    发明授权
    Configurable ASIC for use with a programmable I/O module 有权
    可编程ASIC用于可编程I / O模块

    公开(公告)号:US07881323B2

    公开(公告)日:2011-02-01

    申请号:US11627458

    申请日:2007-01-26

    IPC分类号: H04L12/28 H04J3/02

    CPC分类号: H03K19/177

    摘要: An application-specific integrated circuit (ASIC) for use with a programmable I/O module includes programmable circuitry that enables the ASIC to be configured to support various different I/O functions. The ASIC includes a pin interface, a data interface, a digital section, and an analog section. The pin interface supports analog and digital signal communication and the data interface supports digital data communication. The digital section includes registers for storing digital data such as configuration commands, signal control commands, and digital signal information. The analog section is in electrical signal communication with pin interface and digital data communication with the registers. The analog section includes multiple function-specific elements for processing an electrical signal that is communicated via the pin interface such that the analog section can be configured to establish one of multiple different function-specific processing paths in response to a configuration command received via the data interface.

    摘要翻译: 与可编程I / O模块一起使用的专用集成电路(ASIC)包括可编程电路,使ASIC能够配置为支持各种不同的I / O功能。 ASIC包括引脚接口,数据接口,数字部分和模拟部分。 引脚接口支持模拟和数字信号通信,数据接口支持数字数据通信。 数字部分包括用于存储诸如配置命令,信号控制命令和数字信号信息的数字数据的寄存器。 模拟部分与引脚接口进行电信号通信,并与寄存器进行数字数据通信。 模拟部分包括用于处理通过引脚接口传送的电信号的多个功能特定元件,使得模拟部分可以被配置为响应于经由数据接收到的配置命令来建立多个不同的功能特定处理路径中的一个 接口。

    CONFIGURABLE ASIC FOR USE WITH A PROGRAMMABLE I/O MODULE
    2.
    发明申请
    CONFIGURABLE ASIC FOR USE WITH A PROGRAMMABLE I/O MODULE 有权
    可编程ASIC用于可编程I / O模块

    公开(公告)号:US20080111581A1

    公开(公告)日:2008-05-15

    申请号:US11627458

    申请日:2007-01-26

    IPC分类号: H03K19/173

    CPC分类号: H03K19/177

    摘要: An application-specific integrated circuit (ASIC) for use with a programmable I/O module includes programmable circuitry that enables the ASIC to be configured to support various different I/O functions. The ASIC includes a pin interface, a data interface, a digital section, and an analog section. The pin interface supports analog and digital signal communication and the data interface supports digital data communication. The digital section includes registers for storing digital data such as configuration commands, signal control commands, and digital signal information. The analog section is in electrical signal communication with pin interface and digital data communication with the registers. The analog section includes multiple function-specific elements for processing an electrical signal that is communicated via the pin interface such that the analog section can be configured to establish one of multiple different function-specific processing paths in response to a configuration command received via the data interface.

    摘要翻译: 与可编程I / O模块一起使用的专用集成电路(ASIC)包括可编程电路,使ASIC能够配置为支持各种不同的I / O功能。 ASIC包括引脚接口,数据接口,数字部分和模拟部分。 引脚接口支持模拟和数字信号通信,数据接口支持数字数据通信。 数字部分包括用于存储诸如配置命令,信号控制命令和数字信号信息的数字数据的寄存器。 模拟部分与引脚接口进行电信号通信,并与寄存器进行数字数据通信。 模拟部分包括用于处理通过引脚接口传送的电信号的多个功能特定元件,使得模拟部分可以被配置为响应于经由数据接收到的配置命令来建立多个不同的功能特定处理路径中的一个 接口。

    Temperature Compensation Circuit and Method
    3.
    发明申请
    Temperature Compensation Circuit and Method 失效
    温度补偿电路及方法

    公开(公告)号:US20090302954A1

    公开(公告)日:2009-12-10

    申请号:US12134323

    申请日:2008-06-06

    IPC分类号: G05D23/20 H03K3/26

    CPC分类号: H03K3/011 H03K3/0231

    摘要: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

    摘要翻译: 公开了可以使用常规CMOS制造技术制造的温度补偿张弛振荡器电路的各种实施例。 本文描述的张弛振荡器电路表现出优异的低温系数性能特性,并且不需要使用昂贵的片外高精度电阻器来实现温度补偿。 布置在电阻器阵列中的正和负温度系数电阻彼此偏移以在张弛振荡器电路中提供温度补偿。

    Temperature compensation circuit and method
    4.
    发明授权
    Temperature compensation circuit and method 失效
    温度补偿电路及方法

    公开(公告)号:US08067992B2

    公开(公告)日:2011-11-29

    申请号:US12134323

    申请日:2008-06-06

    IPC分类号: H03K3/26

    CPC分类号: H03K3/011 H03K3/0231

    摘要: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

    摘要翻译: 公开了可以使用常规CMOS制造技术制造的温度补偿张弛振荡器电路的各种实施例。 本文描述的张弛振荡器电路表现出优异的低温系数性能特性,并且不需要使用昂贵的片外高精度电阻器来实现温度补偿。 布置在电阻器阵列中的正和负温度系数电阻彼此偏移以在张弛振荡器电路中提供温度补偿。

    Method and apparatus for detecting an error in a bit sequence
    5.
    发明授权
    Method and apparatus for detecting an error in a bit sequence 有权
    用于检测比特序列中的错误的方法和装置

    公开(公告)号:US07493530B2

    公开(公告)日:2009-02-17

    申请号:US10606970

    申请日:2003-06-25

    申请人: Tong Tee Tan

    发明人: Tong Tee Tan

    IPC分类号: G06F11/00 G01R31/28

    CPC分类号: H04L1/0045 H04L1/0061

    摘要: An error detector for a pseudo-random bit sequence (PRBS). A plurality of bits of a PRBS are received in a predictor circuit. A comparator compares two of the bits to predict a next bit in the sequence. The predicted next bit is compared with the actual next bit that is received to determine if there is an error in the actual next bit, and if so, the actual next bit is corrected accordingly. The erroneous actual next bit is replaced with the corrected actual next bit and is then used to predict a future actual next bit. A trigger circuit delays correction during initial operation until the predictor contains a bit sequence in which no errors have been detected.

    摘要翻译: 用于伪随机位序列(PRBS)的误差检测器。 PRBS的多个比特在预测器电路中被接收。 比较器比较两个比特以预测序列中的下一个比特。 将预测的下一位与接收的实际下一位进行比较,以确定实际下一位是否存在错误,如果是,则相应地修正实际的下一位。 错误的实际下一位被修正的实际下一位替换,然后用于预测将来的实际下一位。 触发电路在初始操作期间延迟校正,直到预测器包含未检测到错误的位序列。