公开(公告)号：US20230092000A1

公开(公告)日：2023-03-23

申请号：US17699942

申请日：2022-03-21

Applicant: Kioxia Corporation

Inventor： Benjamin Kerr ,  Philip Rose ,  Robert Reed

IPC: G06F13/16 ,  G06F13/42 ,  H04L1/00 ,  G06F1/3234

Abstract: A system for serial communication includes a controller, a semiconductor package comprising a plurality of semiconductor die, and a serial interface configured to connect the plurality of semiconductor die to the controller. The serial interface includes a controller-to-package connection and a package-to-controller connection, and the serial interface is configured to employ a signaling protocol using differential data signaling with no separate clock signals.

公开(公告)号：US11907140B2

公开(公告)日：2024-02-20

申请号：US17699942

申请日：2022-03-21

Applicant: Kioxia Corporation

Inventor： Benjamin Kerr ,  Philip Rose ,  Robert Reed

IPC: G06F13/16 ,  G06F13/42 ,  H04L1/00 ,  G06F1/3234

CPC classification number: G06F13/1689 ,  G06F1/3243 ,  G06F13/4291 ,  H04L1/004

Abstract: A system for serial communication includes a controller, a semiconductor package comprising a plurality of semiconductor die, and a serial interface configured to connect the plurality of semiconductor die to the controller. The serial interface includes a controller-to-package connection and a package-to-controller connection, and the serial interface is configured to employ a signaling protocol using differential data signaling with no separate clock signals.

公开(公告)号：US11211329B2

公开(公告)日：2021-12-28

申请号：US16832498

申请日：2020-03-27

Applicant: Kioxia Corporation

Inventor： Benjamin Kerr

IPC: H01L29/40 ,  H01L23/52 ,  H01L23/48 ,  H01L23/528 ,  H01L23/49 ,  H01L23/498 ,  H01L23/00

Abstract: A semiconductor chip includes a semiconductor die formed on a substrate, a first power mesh formed on the substrate, and a second power mesh formed on the substrate electrically isolated from the first power mesh. The semiconductor chip also includes a first circuit block formed on the substrate and electrically connected to the first power mesh, and a second circuit block formed on the substrate and electrically connected to the second power mesh. The first circuit block and the second circuit block are communicatively coupled to a first plurality of external circuit connections and a second plurality of external circuit connections, respectively. The semiconductor chip also includes one or more first signal pins and one or more second signal pins formed on the substrate, the first and second signal pins designed to receive external signals.