公开(公告)号：US20240298445A1

公开(公告)日：2024-09-05

申请号：US18587080

申请日：2024-02-26

Applicant: Kioxia Corporation

Inventor： Yosuke MITSUNO ,  Ryouji MASUDA ,  Tatsufumi HAMADA ,  Tomohiro KUKI ,  Yusuke MORIKAWA

IPC: H10B43/27

CPC classification number: H10B43/27

Abstract: A semiconductor memory device has a chip shape. A stacked body is formed by alternately stacking, in a first direction, a plurality of first insulating layers and a plurality of first conductive layers each of which functions as a control gate of a memory cell transistor. A first columnar body extends in the first direction in the stacked body and includes a first semiconductor portion. An insulating film is provided at an end portion of the semiconductor memory device. A second columnar body extends in the first direction in the insulating film and includes a second semiconductor portion that is shorter than the first semiconductor portion in the first direction. An impurity concentration of the second semiconductor portion at a bottom portion of the second columnar body is higher than that of the first semiconductor portion at an intersection portion between the first columnar body and the first conductive layer.

公开(公告)号：US20240090222A1

公开(公告)日：2024-03-14

申请号：US18460303

申请日：2023-09-01

Applicant: Kioxia Corporation

Inventor： Tatsufumi HAMADA ,  Yosuke MITSUNO ,  Tomohiro KUKI ,  Yusuke MORIKAWA ,  Ryouji MASUDA ,  Hiroyasu SATO

IPC: H10B43/27

CPC classification number: H10B43/27

Abstract: A semiconductor memory device includes a stacked body in which a first insulating layer and a first conductive layer are alternately stacked in a first direction. A columnar body includes a first insulating portion extending in the first direction in the stacked body, a first semiconductor portion provided between the first insulating portion and the stacked body, and a third insulating portion provided between a second insulating portion provided between the first semiconductor portion and the stacked body, and the second insulating portion and the stacked body, and has a first end and a second end opposite to the first end. A second conductive layer is provided on the stacked body and is electrically connected to the first semiconductor portion at the first end of the columnar body. The first insulating portion blocks an inner side of the first semiconductor portion at the first end of the columnar body and has a space in the first semiconductor portion at a position closer to the second end than the first end.

公开(公告)号：US20230403955A1

公开(公告)日：2023-12-14

申请号：US18330515

申请日：2023-06-07

Applicant: Kioxia Corporation

Inventor： Ryouji MASUDA ,  Hiroki TOKUHIRA

IPC: H10N70/00 ,  H10B63/10 ,  H10B63/00 ,  H10N70/20

CPC classification number: H10N70/8616 ,  H10B63/10 ,  H10B63/20 ,  H10B63/80 ,  H10N70/231 ,  H10N70/8413 ,  H10N70/8828 ,  H10N70/063

Abstract: A semiconductor memory device includes: a first wiring extending in a first direction; a second wiring extending in a second direction that intersects with the first direction; a resistance change film provided between the first wiring and the second wiring and including at least one element selected from a group consisting of germanium, antimony, and tellurium; an electrode provided between the resistance change film and the first wiring; and a first film selectively provided between the electrode and the first wiring, in which the electrode includes a surface in contact with both of the first wiring and the first film.