公开(公告)号：US11183256B2

公开(公告)日：2021-11-23

申请号：US16914733

申请日：2020-06-29

Applicant: Kioxia Corporation

Inventor： Koichi Shinohara ,  Katsuki Matsudera ,  Ian Christopher Gamara ,  Yoshikazu Harada ,  Noritaka Kai ,  Yusuke Tanefusa

IPC: G11C16/04 ,  G11C16/34 ,  G11C16/14 ,  G11C16/08 ,  G06F9/30 ,  G11C16/24

Abstract: According to a certain embodiment, the semiconductor memory device includes a memory cell array, a control circuit, and a data register storing an erase verify fail flag. An erase target block is divided into word line groups. The control circuit includes: a counter configured to count the number of the erase verify fail flags to be output as a count value for each group; a plurality of counter registers configured to store the count value for each group; an arithmetic circuit configured to take a difference of the plurality of count values respectively stored in the plurality of counter registers and to output a result of the difference as a number of second fail flags; and a comparator configured to compare the number of criteria of the erase verify fail flag and the number of the second fail flags to be output as a memory state detected result.

公开(公告)号：US11309053B2

公开(公告)日：2022-04-19

申请号：US17009404

申请日：2020-09-01

Applicant: Kioxia Corporation

Inventor： Takehisa Kurosawa ,  Koichi Shinohara ,  Yusuke Tanefusa

IPC: G11C29/44 ,  G11C29/12 ,  G11C29/42 ,  G11C29/14

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell array, a processing circuit, a timer, a command decoder, and a training circuit. The memory cell array includes a plurality of memory cells. The processing circuit writes data into the memory cell array. The timer sets a waiting time. The command decoder receives a command output from a memory controller. The training circuit waits until the waiting time has passed since a predetermined command is received by the command decoder and performs a process relating to determination of a correction value for a signal sent from the memory controller to the processing circuit based on reference data output from the memory controller after the waiting time has passed.

公开(公告)号：US20210082536A1

公开(公告)日：2021-03-18

申请号：US17009404

申请日：2020-09-01

Applicant: Kioxia Corporation

Inventor： Takehisa KUROSAWA ,  Koichi Shinohara ,  Yusuke Tanefusa

IPC: G11C29/44 ,  G11C29/12 ,  G11C29/14 ,  G11C29/42

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell array, a processing circuit, a timer, a command decoder, and a training circuit. The memory cell array includes a plurality of memory cells. The processing circuit writes data into the memory cell array. The timer sets a waiting time. The command decoder receives a command output from a memory controller. The training circuit waits until the waiting time has passed since a predetermined command is received by the command decoder and performs a process relating to determination of a correction value for a signal sent from the memory controller to the processing circuit based on reference data output from the memory controller after the waiting time has passed.