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公开(公告)号：US09576536B2
公开(公告)日：2017-02-21
申请号：US14218956
申请日：2014-03-18
发明人： Oh Jo Kwon , Kyung Youl Min , Choong Sun Shin , Hee Sun Ahn , Hyun Sik Kim , Jun Suk Bang , Gyu Hyeong Cho
CPC分类号： G09G3/3291 , G09G2300/0814 , G09G2300/0819 , G09G2320/0295
摘要： A display device according to an embodiment of the present invention includes: a pixel configured to emit light according to a data signal supplied to a data line, a power source voltage supplier configured to supply a power source voltage to the pixel, a driving transistor configured to drive the pixel to be emitted according to the data signal and the power source voltage, and a sensor configured to supply a test signal to a data line and to detect a sensing current flowing to the data line through the driving transistor according to the test signal.
摘要翻译： 根据本发明的实施例的显示装置包括：被配置为根据提供给数据线的数据信号发光的像素，被配置为向像素提供电源电压的电源电压供给器，被配置为 根据数据信号和电源电压驱动要发射的像素;以及传感器，被配置为向数据线提供测试信号，并且根据测试来检测流过驱动晶体管的数据线的感测电流 信号。
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2.发明申请NON-LINEAR GAMMA COMPENSATION CURRENT MODE DIGITAL-ANALOG CONVERTOR AND DISPLAY DEVICE INCLUDING THE SAME 审中-公开非线性伽马补偿电流模式数字模拟转换器和包括其的显示装置公开(公告)号：US20150091784A1
公开(公告)日：2015-04-02
申请号：US14218952
申请日：2014-03-18
发明人： Oh Jo Kwon , Kyung Youl Min , Choong Sun Shin , Hee Sun Ahn , Hyun Sik Kim , Jun Suk Bang , Gyu Hyeong Cho
CPC分类号： H03M1/72 , G09G3/3275 , G09G2320/0276 , G09G2320/043 , G09G2320/0673
摘要： A non-linear gamma compensation current mode digital-analog converter includes: a first digital-analog converter block configured to: receive a digital signal, a first reference voltage, and a gamma adjustment voltage, and provide a reference current to a ground, wherein a first current flowing to a first current output terminal is determined according to the digital signal and the gamma adjustment voltage; and a second digital-analog converter block configured to: receive the digital signal, a second reference voltage, and a ground voltage, and provide the first current to the first digital-analog converter, wherein a second current flowing to a second current output terminal is determined according to the digital signal and the first current.
摘要翻译： 非线性伽马补偿电流模式数模转换器包括：第一数模转换器模块，被配置为：接收数字信号，第一参考电压和伽马调整电压，并向地面提供参考电流，其中 根据数字信号和伽马调整电压确定流向第一电流输出端的第一电流; 以及第二数模转换器模块，被配置为：接收数字信号，第二参考电压和接地电压，并将第一电流提供给第一数模转换器，其中流过第二电流输出端的第二电流 根据数字信号和第一电流来确定。
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公开(公告)号：US10044366B2
公开(公告)日：2018-08-07
申请号：US14218952
申请日：2014-03-18
发明人： Oh Jo Kwon , Kyung Youl Min , Choong Sun Shin , Hee Sun Ahn , Hyun Sik Kim , Jun Suk Bang , Gyu Hyeong Cho
IPC分类号： G09G3/32 , H03M1/72 , G09G3/3275
摘要： A non-linear gamma compensation current mode digital-analog converter includes: a first digital-analog converter block configured to: receive a digital signal, a first reference voltage, and a gamma adjustment voltage, and provide a reference current to a ground, wherein a first current flowing to a first current output terminal is determined according to the digital signal and the gamma adjustment voltage; and a second digital-analog converter block configured to: receive the digital signal, a second reference voltage, and a ground voltage, and provide the first current to the first digital-analog converter, wherein a second current flowing to a second current output terminal is determined according to the digital signal and the first current.
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公开(公告)号：US20150138177A1
公开(公告)日：2015-05-21
申请号：US14301311
申请日：2014-06-10
发明人： Oh Jo Kwon , Choong Sun Shin , Hyun Sik Kim , Jun Suk Bang , Gyu Hyeong Cho
IPC分类号： G09G3/32
CPC分类号： G09G3/3291 , G09G3/3233 , G09G2300/0819 , G09G2310/0251 , G09G2320/0233 , G09G2320/0285 , G09G2320/0295 , G09G2320/043
摘要： A display device includes: a plurality of pixels, each being coupled to a corresponding data line among a plurality of data lines and a corresponding scan line among a plurality of scan lines; a scan driver to supply a scan signal to the scan lines; a sensor coupled to the pixels and the data lines and configured to detect a sensing current according to a test signal input to the data lines; and a controller configured to detect a pixel current of a pixel corresponding to a scan line to which the scan signal is supplied, by using a first sensing current corresponding to a first pixel and a second sensing current corresponding to a second pixel, when the scan signal is selectively supplied to a first scan line coupled to the first pixel and a second scan line coupled to the second pixel.
摘要翻译： 显示装置包括：多个像素，每个像素耦合到多个数据线中的相应数据线和多条扫描线中的相应扫描线; 扫描驱动器，用于向扫描线提供扫描信号; 耦合到所述像素和所述数据线并被配置为根据输入到所述数据线的测试信号来检测感测电流的传感器; 以及控制器，被配置为通过使用与第一像素对应的第一感测电流和对应于第二像素的第二感测电流来检测与被提供扫描信号的扫描线相对应的像素的像素电流，当扫描 信号被选择性地提供给耦合到第一像素的第一扫描线和耦合到第二像素的第二扫描线。
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公开(公告)号：US20150103062A1
公开(公告)日：2015-04-16
申请号：US14218956
申请日：2014-03-18
发明人： Oh Jo Kwon , Kyung Youl Min , Choong Sun Shin , Hee Sun Ahn , Hyun Sik Kim , Jun Suk Bang , Gyu Hyeong Cho
IPC分类号： G09G3/36
CPC分类号： G09G3/3291 , G09G2300/0814 , G09G2300/0819 , G09G2320/0295
摘要： A display device according to an embodiment of the present invention includes: a pixel configured to emit light according to a data signal supplied to a data line, a power source voltage supplier configured to supply a power source voltage to the pixel, a driving transistor configured to drive the pixel to be emitted according to the data signal and the power source voltage, and a sensor configured to supply a test signal to a data line and to detect a sensing current flowing to the data line through the driving transistor according to the test signal.
摘要翻译： 根据本发明的实施例的显示装置包括：被配置为根据提供给数据线的数据信号发光的像素，被配置为向像素提供电源电压的电源电压供给器，被配置为 根据数据信号和电源电压驱动要发射的像素;以及传感器，被配置为向数据线提供测试信号，并且根据测试来检测流过驱动晶体管的数据线的感测电流 信号。
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公开(公告)号：US11837132B2
公开(公告)日：2023-12-05
申请号：US17500875
申请日：2021-10-13
发明人： Seong Joo Lee , Seok Tae Koh , Gyeong Gu Kang , Oh Jo Kwon , Hyun Sik Kim , Gyu Wan Lim , Keum Dong Jung
IPC分类号： G09G3/20
CPC分类号： G09G3/20 , G09G2300/0426 , G09G2300/0809 , G09G2300/0828 , G09G2310/0243 , G09G2310/0272 , G09G2310/0291 , G09G2310/08
摘要： An output buffer is disclosed that includes: a buffer circuit that outputs an output signal to an output terminal based on a first input signal provided to a first input terminal and a second input signal provided to a second input terminal; and a current supply circuit that is connected in parallel to the buffer circuit, and provides an auxiliary current to the output terminal based on the first input signal and the second input signal.
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公开(公告)号：US09734765B2
公开(公告)日：2017-08-15
申请号：US14301311
申请日：2014-06-10
发明人： Oh Jo Kwon , Choong Sun Shin , Hyun Sik Kim , Jun Suk Bang , Gyu Hyeong Cho
IPC分类号： G06F3/038 , G09G5/00 , G09G3/3291 , G09G3/3233
CPC分类号： G09G3/3291 , G09G3/3233 , G09G2300/0819 , G09G2310/0251 , G09G2320/0233 , G09G2320/0285 , G09G2320/0295 , G09G2320/043
摘要： A display device includes: a plurality of pixels, each being coupled to a corresponding data line among a plurality of data lines and a corresponding scan line among a plurality of scan lines; a scan driver to supply a scan signal to the scan lines; a sensor coupled to the pixels and the data lines and configured to detect a sensing current according to a test signal input to the data lines; and a controller configured to detect a pixel current of a pixel corresponding to a scan line to which the scan signal is supplied, by using a first sensing current corresponding to a first pixel and a second sensing current corresponding to a second pixel, when the scan signal is selectively supplied to a first scan line coupled to the first pixel and a second scan line coupled to the second pixel.
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公开(公告)号：US11271582B2
公开(公告)日：2022-03-08
申请号：US17168448
申请日：2021-02-05
发明人： Seong Joo Lee , Oh Jo Kwon , Gyeong Gu Kang , Seok Tae Koh , Joon Chul Goh , Hyun Sik Kim , Bong Hyun You
摘要： A digital-to-analog converter (“DAC”) converts digital image data into analog image signals. The DAC includes a stage outputting different voltages to a first output terminal and a second output terminal based on a voltage supplied to a first input terminal, a voltage supplied to a second input terminal, and a first input bit. The stage includes a switch circuit including switches that are alternately turned on by a control signal, and outputting an intermediate output voltage to a third output terminal based on a first input voltage supplied to the first input terminal and a second input voltage supplied to the second input terminal, and a selector outputting one of the first input voltage and the second input voltage, and the intermediate output voltage.
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公开(公告)号：US11721265B1
公开(公告)日：2023-08-08
申请号：US17985554
申请日：2022-11-11
发明人： Hyung Gun Ma , Gyu Wan Lim , Gyeong Gu Kang , Hyun Sik Kim , Keum Dong Jung , Moon Jae Jeong
IPC分类号： G09G3/20 , G06F3/044 , G09G3/3208 , H10K59/40
CPC分类号： G09G3/20 , G06F3/044 , G09G3/3208 , G09G2300/0828 , G09G2300/0852 , G09G2300/0871 , G09G2310/027 , G09G2310/0291 , G09G2330/028 , H10K59/40
摘要： A data driving circuit includes: a resistor string in which a plurality of resistors are connected in series; and a plurality of data channels connected to a high voltage node, intermediate voltage nodes, and a low voltage node of the resistor string and configured to convert a digital data signal into an analog data voltage. Each of the plurality of data channels includes: a main digital-to-analog converter connected to the high voltage node, the intermediate voltage nodes, and the low voltage node, a multiplier connected to an output terminal of the main digital-to-analog converter, a sub digital-to-analog converter connected to some of the high voltage node, the intermediate voltage nodes, and the low voltage node, and a voltage synthesizer connected to an output terminal of the multiplier and an output terminal of the sub digital-to-analog converter.
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公开(公告)号：US12125426B2
公开(公告)日：2024-10-22
申请号：US18210960
申请日：2023-06-16
发明人： Hyung Gun Ma , Gyu Wan Lim , Gyeong Gu Kang , Hyun Sik Kim , Keum Dong Jung , Moon Jae Jeong
IPC分类号： G09G3/20 , G06F3/044 , G09G3/3208 , H10K59/40
CPC分类号： G09G3/20 , G06F3/044 , G09G3/3208 , G09G2300/0828 , G09G2300/0852 , G09G2300/0871 , G09G2310/027 , G09G2310/0291 , G09G2330/028 , H10K59/40
摘要： A data driving circuit includes: a resistor string in which a plurality of resistors are connected in series; and a plurality of data channels connected to a high voltage node, intermediate voltage nodes, and a low voltage node of the resistor string and configured to convert a digital data signal into an analog data voltage. Each of the plurality of data channels includes: a main digital-to-analog converter connected to the high voltage node, the intermediate voltage nodes, and the low voltage node, a multiplier connected to an output terminal of the main digital-to-analog converter, a sub digital-to-analog converter connected to some of the high voltage node, the intermediate voltage nodes, and the low voltage node, and a voltage synthesizer connected to an output terminal of the multiplier and an output terminal of the sub digital-to-analog converter.
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