公开(公告)号：US06904022B2

公开(公告)日：2005-06-07

申请号：US09737760

申请日：2001-03-23

申请人： Kosuke Matsunaga ,  Hiroyuki Kanai ,  Shinichiro Fujita

发明人： Kosuke Matsunaga ,  Hiroyuki Kanai ,  Shinichiro Fujita

IPC分类号： G06F13/38 ,  G06F13/42 ,  H04L12/28 ,  H04L12/40 ,  H04L12/64

CPC分类号： H04L12/40123 ,  G06F13/4291

摘要： The objective of the present invention is to provide a data transfer control device, information storage medium, and electronic equipment that can relieve the inconveniences caused whenever a reset that clears node topology information occurs. If a bus reset occurs during a data transfer period in a data transfer control device in accordance with the IEEE 1394 standard, and also the content of ORBs before and after the bus reset is the same, data transfer restarts from a resumption at the point at which the bus reset occurred, thus preventing duplicate printing in a printer. Whenever a bus reset occurs during a data transfer period, the continuation flag is set to on. The first command block ORB comprising a print command that transferred in after the bus reset is used in the comparison with the pre-bus-reset ORB. When no ACK is returned from the initiator because of a bus reset, a transition to a dead state occurs. The part of transfer data from a scanner that has not yet been transferred to the initiator at point at which the bus reset occurred is retained without being destroyed.

摘要翻译： 本发明的目的是提供一种数据传输控制设备，信息存储介质和电子设备，其可以减轻每当清除节点拓扑信息的复位发生时引起的不便。 如果在根据IEEE 1394标准的数据传输控制装置中的数据传送期间发生总线复位，并且总线复位之前和之后的ORB的内容相同，则数据传输从在 发生总线复位，从而防止打印机中的重复打印。 无论何时在数据传输期间发生总线复位，继续标志设置为开。 在与总线复位ORB进行比较之后，使用包含总线复位后传送的打印命令的第一命令块ORB。 当由于总线复位而没有从启动器返回ACK时，就会发生到死区的转换。 来自扫描仪的传送数据的一部分在尚未被破坏的情况下被保留，该扫描仪尚未被传送到启动器。

公开(公告)号：US07409467B2

公开(公告)日：2008-08-05

申请号：US10781721

申请日：2004-02-20

申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao

发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao

IPC分类号： G06F3/00

CPC分类号： G06F13/28 ,  G06F13/4027 ,  G06F2213/0012

摘要： The system stores a storage address ADK1 of a page table element PEK1 that was being processed when a bus reset occurred, of page table elements of a page table specified by an ORB1. The system then reads out a storage address ADK2 of a page table element PEK2 having the same element number as PEK1, of page table elements of an ORB2 after the bus reset occurs, and restarts data transfer when ADK1 and ADK2 are the same. When the page table is absent, addresses DAD1 and DAD2 that are specified directly by the ORB1 and the ORB2 are compared. When data transfer is not be restarted but a command CMD1 of the ORB1 has already been issued to a device, the CMD1 is aborted.

摘要翻译： 系统存储由ORB1指定的页表的页表元素的总线复位发生时正在处理的页表元素PEK 1的存储地址ADK 1。 然后，在总线复位发生之后，系统读出具有与PEK 1相同的元件编号的页表元件PEK 2的存储地址ADK 2，ORB 2的页表元素，并且当ADK 1和ADK 2 是相同的。 当不存在页表时，比较由ORB 1和ORB 2直接指定的地址DAD 1和DAD 2。 当不重新开始数据传输，但已经向设备发出了ORB 1的命令CMD 1时，CMD 1被中止。

公开(公告)号：US20050076165A1

公开(公告)日：2005-04-07

申请号：US10885139

申请日：2004-07-07

申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao

发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao

IPC分类号： G06F13/36 ,  G06F13/00 ,  G06F13/38

CPC分类号： G06F13/385

摘要： A data transfer control system includes a buffer controller that controls access to a data buffer and a transfer controller that controls data transfer between a PC connected to a BUS1 and the logical units LUN1 and LUN2 connected to a BUS2. The transfer controller includes: a command processing section that starts data transfer to or from the LUN1 based on a command indicated by an ORB for the LUN1 when the ORB is received, and starts data transfer to or from the LUN2 based on a command indicated by an ORB for the LUN2 when the ORB is receive; and a wait processing section that waits the processing of the ORB for the LUN2, when a bus reset occurs during the processing of the ORB for the LUN1 and the ORB for the LUN2 is received after the bus reset has occurred.

摘要翻译： 数据传输控制系统包括控制对数据缓冲器的访问的缓冲器控制器和控制连接到BUS1的PC与连接到BUS2的逻辑单元LUN1和LUN2之间的数据传输的传输控制器。 传送控制器包括：命令处理部分，当接收到ORB时，基于由LUN1的ORB指示的命令开始向LUN1进行数据传送，并且基于由LUN2指示的命令开始到LUN2的数据传送 当ORB接收时，LUN2的ORB为ORB; 以及等待处理部分，当在LUN1的ORB处理期间发生总线复位时，等待处理LUN2的ORB，并且在总线复位发生之后接收到LUN2的ORB。

公开(公告)号：US07366805B2

公开(公告)日：2008-04-29

申请号：US10885139

申请日：2004-07-07

申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao

发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao

IPC分类号： G06F3/00 ,  G06F5/00

CPC分类号： G06F13/385

摘要： A data transfer control system includes a buffer controller that controls access to a data buffer and a transfer controller that controls data transfer between a PC connected to a BUS1 and the logical units LUN1 and LUN2 connected to a BUS2. The transfer controller includes: a command processing section that starts data transfer to or from the LUN1 based on a command indicated by an ORB for the LUN1 when the ORB is received, and starts data transfer to or from the LUN2 based on a command indicated by an ORB for the LUN2 when the ORB is receive; and a wait processing section that waits the processing of the ORB for the LUN2, when a bus reset occurs during the processing of the ORB for the LUN1 and the ORB for the LUN2 is received after the bus reset has occurred.

摘要翻译： 数据传输控制系统包括控制对数据缓冲器的访问的缓冲器控制器和控制连接到总线1的PC与连接到总线2的逻辑单元LUN 1和LUN 2之间的数据传输的传输控制器。 传送控制器包括：命令处理部分，当接收到ORB时，基于由LUN1的ORB指示的命令开始向LUN 1进行数据传送，并且基于以下操作开始向LUN 2发送数据： 当ORB接收时，由ORB为LUN 2指示的命令; 以及等待处理部分，当在LUN 1的ORB处理期间发生总线复位时，等待处理LUN 2的ORB，并且在总线复位发生之后接收到用于LUN 2的ORB。

公开(公告)号：US07165124B2

公开(公告)日：2007-01-16

申请号：US10625748

申请日：2003-07-24

申请人： Shinichiro Fujita ,  Akemi Ito ,  Hiroyuki Kanai ,  Koji Nakao

发明人： Shinichiro Fujita ,  Akemi Ito ,  Hiroyuki Kanai ,  Koji Nakao

IPC分类号： G06F13/28

CPC分类号： G06F13/28

摘要： A data transfer control system receives a command packet ORB transferred through a bus BUS1 (IEEE 1394), issues a command indicated by ORB to a device connected to a bus BUS2 (ATA (IDE)/ATAPI), and orders start of a DMA transfer. The command issued based on ORB is aborted after the completion of the DMA transfer. The data transfer control system compares contents of a command packet ORB1 transferred before a bus reset with contents of a command packet ORB2 transferred after the bus reset. If the contents are different, a command issued based on ORB1 is aborted after completion of a DMA transfer. Dummy data is transferred between the data transfer control system and the device connected to the bus BUS2 until a DMA transfer is completed. Dummy data transfer is controlled by performing a dummy update on a pointer.

摘要翻译： 数据传输控制系统接收通过总线总线1（IEEE 1394）传送的命令分组ORB，将ORB指示的命令发送到连接到总线总线2（ATA（IDE）/ ATAPI）的设备，并且命令开始 DMA传输。 基于ORB发出的命令在DMA传输完成后中止。 数据传输控制系统将总线复位之前传送的命令包ORB 1的内容与总线复位后传送的命令包ORB 2的内容进行比较。 如果内容不同，则在完成DMA传输之后，基于ORB 1发出的命令被中止。 在数据传输控制系统和连接到总线总线2的设备之间传输虚拟数据，直到DMA传输完成。 通过对指针执行虚拟更新来控制虚拟数据传输。

公开(公告)号：US07069350B2

公开(公告)日：2006-06-27

申请号：US10625685

申请日：2003-07-24

申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Akemi Ito

发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Akemi Ito

IPC分类号： G06F13/28

CPC分类号： G06F13/28

摘要： A data transfer control system receives a command packet ORB (SBP-2) transferred through a bus BUS1 (IEEE1394), and issues a command included in the ORB to a device connected with a bus BUS2 (ATA (IDE)/ATAPI). The data transfer control system sets a sufficiently large fixed DMA data length irrespective of the type of the issued command, and instructs start of DMA transfer to or from the device connected with the bus BUS2. The data transfer control system aborts the DMA transfer when a device connected with BUS2 informs of completion of command processing. As the fixed DMA data length, a value greater than a storage capacity of a storage or a value greater than a data length which can be designated by a command is employed. The data transfer control system issues a command included in the ORB to a device connected with the bus BUS2 without decoding the command.

摘要翻译： 数据传输控制系统接收通过总线总线1（IEEE1394）传送的命令分组ORB（SBP-2），并将包括在ORB中的命令发送到与总线BUS 2（ATA（IDE）/ ATAPI）连接的设备） 。 数据传输控制系统设置足够大的固定DMA数据长度，而不管所发出的命令的类型如何，并且指示开始DMA传输到与总线BUS 2连接的设备。 当与BUS 2连接的设备通知完成命令处理时，数据传输控制系统中止DMA传输。 作为固定DMA数据长度，采用大于存储容量的值或大于可由命令指定的数据长度的值。 数据传输控制系统将ORB中包括的命令发送到与总线BUS 2连接的设备，而不对该命令进行解码。

公开(公告)号：US20060041611A1

公开(公告)日：2006-02-23

申请号：US11186080

申请日：2005-07-21

申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao ,  Hiroshi Yakushiji

发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao ,  Hiroshi Yakushiji

IPC分类号： G06F15/16

CPC分类号： G06F13/4226 ,  H04L12/40123 ,  Y02D10/14 ,  Y02D10/151

摘要： A data transfer control system that controls data transfer between a first electronic apparatus connected via a first bus and a device connected via a second bus, including: a management section that conducts a process of receiving a login request when a login request for acquirement of a right to access to the device comes from the first electronic apparatus and that conducts a process of receiving a logout request when a logout request for abandonment of the access right acquired upon receipt of the login request comes from the first electronic apparatus; and a power control section that conducts power control by turning on power supply to the device when the login request to the device comes from the first electronic apparatus.

摘要翻译： 一种数据传输控制系统，其控制经由第一总线连接的第一电子设备与经由第二总线连接的设备之间的数据传输，所述数据传输控制系统包括：管理单元，其执行当登录请求获取时的接收登录请求的处理 访问该设备的权利来自第一电子设备，并且当在接收到登录请求时获取的访问权限的退出请求来自第一电子设备时，执行接收注销请求的过程; 以及电源控制部，其通过在对所述装置的登录请求来自所述第一电子装置的情况下接通所述装置的电力来进行电力控制。

公开(公告)号：US07424580B2

公开(公告)日：2008-09-09

申请号：US10625643

申请日：2003-07-24

申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Akemi Ito

发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Akemi Ito

IPC分类号： G06F13/00

CPC分类号： G06F13/4027

摘要： Information that is transferred through a bus BUS1 (conforming to IEEE 1394) is downloaded into a rewrite area storing device information (such as GUID or config ROM) and data transfer control program information (such as a SBP-2 firmware program), and rewriter processing is performed to write the information into the rewrite area. When it is detected that no device is connected to a bus BUS2 (conforming to ATA/ATAPI or IDE), the rewriter processing starts. The detection of whether or not a device is connected to BUS2 is based on the result of an access to a register of the device. In a download mode, the information is written into the rewrite area by transferring data to and from a PC connected to BUS1.

摘要翻译： 通过总线BUS 1传送的信息（符合IEEE 1394）被下载到存储设备信息（例如GUID或配置ROM）和数据传送控制程序信息（例如SBP-2固件程序）的重写区域中，以及 执行重写器处理以将信息写入重写区域。 当检测到没有设备连接到总线总线2（符合ATA / ATAPI或IDE）时，重写器处理开始。 检测设备是否连接到总线2是基于访问设备的寄存器的结果。 在下载模式下，通过将数据传送到连接到总线1的PC和从连接到总线1的PC进行数据写入重写区域。

公开(公告)号：US07395365B2

公开(公告)日：2008-07-01

申请号：US10625625

申请日：2003-07-24

申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Tomohiro Uchida ,  Mihiro Nonoyama

发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Tomohiro Uchida ,  Mihiro Nonoyama

IPC分类号： G06F13/38

CPC分类号： H04L29/06 ,  H04L69/32

摘要： A data transfer control system includes: a port control section which controls ports P1 and P2 respectively connected with an electronic instrument PC1 and an electronic instrument PC2; and a bus reset issue section which issues a bus reset. The port P2 is set to a disabled state, and then the bus reset is issued to cause the electronic instrument PC1 to acquire an access right. The port P2 is set to an enabled state after the bus reset has been issued and the electronic instrument PC1 has acquired the access right. After the electronic instrument PC2 has been detected to be in a suspended state, a resume packet is transferred to the electronic instrument PC2. The port P2 is set to a disabled state after the power for the data transfer control system has been turned on.

摘要翻译： 数据传送控制系统包括：端口控制部，控制分别与电子仪器PC 1连接的端口P1和P2;电子仪器PC2; 以及总线复位问题部分，发出总线复位。 端口P 2被设置为禁用状态，然后发出总线复位以使电子仪器PC 1获取访问权限。 在发出总线复位并且电子仪器PC 1已经获取访问权限之后，端口P 2被设置为使能状态。 在电子仪器PC2被检测到处于暂停状态之后，恢复分组被传送到电子仪器PC 2。 在数据传输控制系统的电源已经接通之后，端口P 2被设置为禁用状态。

公开(公告)号：US20060041689A1

公开(公告)日：2006-02-23

申请号：US11186079

申请日：2005-07-21

申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao ,  Hiroshi Yakushiji

发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Koji Nakao ,  Hiroshi Yakushiji

IPC分类号： G06F13/10

CPC分类号： G06F1/3209 ,  G06F1/3215 ,  G06F1/3268 ,  G06F13/387 ,  Y02D10/151 ,  Y02D10/154

摘要： A data transfer control system for controlling data transfer between a first electronic apparatus coupled to a first bus and a device coupled to a second bus including a coupling control unit that issues an instruction to execute attachment to the first bus before power supply to the device is turned on, a bus state monitoring unit that detects whether or not the first bus enters a reset state after attachment and a power supply control unit that implements power supply control to turn on power supply to the device if a reset state of the first bus is detected.

摘要翻译： 一种用于控制耦合到第一总线的第一电子设备与耦合到第二总线的设备之间的数据传输的数据传输控制系统，包括在向设备供电之前发出执行附着到第一总线的指令的耦合控制单元 打开，总线状态监视单元，其检测在第一总线是否在安装之后进入复位状态;以及电源控制单元，如果第一总线的复位状态是第一总线，则实施电源控制以接通设备的电源 检测到。